Semiconductor-device design method, semiconductor-device design program and semiconductor-device design apparatus
AssigneeFujitsu Limited
InventorsHisayoshi Ohba, Jun Watanabe
Life of this patent
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AssigneeFujitsu Limited
InventorsHisayoshi Ohba, Jun Watanabe
Estimating the term…
A semiconductor-device design method considering change in capacitance between wiring patterns due to an inserted dummy pattern. An information reception part receives dummy rule information about rules for dummy patterns and process information about wiring structure of wiring patterns. A capacitance calculation part calculates a capacitance value for each of wiring distances between the wiring patterns defined by the process information, under the condition that a dummy pattern defined by the dummy rule information is inserted between the wiring patterns. A wiring-pattern capacitance calculation part calculates capacitance values between wiring patterns of an intended semiconductor device defined by layout data stored in a layout database, referring to the capacitance values calculated by the capacitance calculation part. Thus, a semiconductor device considering change in capacitance between wiring patterns due to an inserted dummy pattern is designed.
A semiconductor-device design method using a computer, considering change in capacitance due to a dummy pattern, comprising the steps of:
A semiconductor-device design program considering change in capacitance due to a dummy pattern, the program making a computer
A recording medium readable by a computer on which a semiconductor-device design program considering change in capacitance due to a dummy pattern is recorded, the program making a computer
A semiconductor-device design apparatus considering change in capacitance due to a dummy pattern, comprising:
Dependencies are inferred from the claim text.