Error detection/correction code which detects and corrects memory module/transmitter circuit failure

A method comprising:

• encoding a data block with a plurality of check bits, wherein the plurality of check bits are defined to provide at least detection of a failure of one of a plurality of memory modules, each of the plurality of memory modules including a plurality of memory devices arranged thereon, the plurality of memory devices included in a memory;
• and
• writing the encoded data block to the memory.

An apparatus comprising:

• means for encoding a data block with a plurality of check bits, wherein the plurality of check bits are defined to provide at least detection of a failure of one of a plurality of memory modules, each of the plurality of memory modules including a plurality of memory devices arranged thereon, the plurality of memory devices included in a memory;
• and
• means for writing the encoded data block to the memory.

A communication system comprising:

• a check bit encoder circuit coupled to receive a data block to be transmitted via a transmission medium, the transmission medium comprising a plurality of transmitter circuits, each of the plurality of transmitter circuits coupled to a plurality of paths, wherein the check bit encoder circuit is configured to encode the data block with a plurality of check bits to generate an encoded data block, wherein the plurality of check bits are defined to provide at least detection of a failure of one of the plurality of transmitter circuits and correction for a failure of one of the plurality of paths;
• and
• a check/correct circuit coupled to receive the encoded data block from the transmission medium, wherein the check/correct circuit is configured to detect the failure of one of the plurality of transmitter circuits responsive to decoding the encoded data block.