Icache and general array power reduction method for loops
AssigneeInternational Business Machines Corporation
InventorDavid A. Luick
Life of this patent
Estimating the term…
Abstract
A system and methods for reducing power consumption in a computing device during the execution of a tight loop. When a tight loop is detected, the data cache and the translation look-aside buffer are powered off until the end of the loop. The instruction cache and the branching unit are also powered off, except for monitoring the end of the loop condition.
Claims13
A system for reducing power consumption in a computing device when the computing device executes instructions in a tight loop, the system comprising:
- a data cache;
- a translation look-aside buffer;
- an effective address generation unit in communication with the data cache and the translation look-aside buffer;
- a previous effective address register for holding a previous effective address from the effective address generation unit;
- and
- an effective address comparator for comparing a new effective address from the effective address generation unit with the previous effective address from the previous effective address register,
- wherein if the new effective address is the same as the previous effective address, then an inhibit signal is sent from the effective address comparator to the data cache to inhibit new data fetch operation in the data cache, thus reducing power consumed by the data cache.
A system for reducing power consumption in a computing device when the computing device executes instructions in a tight loop, the system comprising:
- an instruction cache;
- a loop counter;
- a branching logic unit in communication with the instruction cache and the loop counter, the branching logic unit being divided into a plurality of clock domains, so that each clock domain in the plurality of clock domains can be individually disabled to reduce power consumption when not in use;
- and
- a branching address generator connected to the branching logic unit that is disabled when the computing device is in a tight loop, so as to reduce power consumption,
- a selected one of the plurality of clock domains being a loop clock domain that is in communication with the loop counter.
A method for reducing power consumption in a computing device when the computing device executes instructions in a tight loop, the method comprising the steps of:
- detecting the computing device is in a tight loop;
- storing a previous effective address in a previous effective address register;
- generating a new effective address;
- comparing the previous effective address with the new effective address;
- if the previous effective address matches the new effective address, then sending an inhibit signal to a data cache and to a translation look-aside buffer;
- if the inhibit signal is received by the data cache, then disabling the data cache to reduce power consumed by the data cache;
- and
- if the inhibit signal is received by the translation look-aside buffer, then disabling the translation look-aside buffer to reduce power consumed by the translation look-aside buffer.
A method for reducing power consumption in a computing device when the computing device executes instructions in a tight loop, the method comprising the steps of:
- detecting the computing device is in a tight loop;
- dividing a branching logic unit into a plurality of clock domains, one of the clock domains being a loop clock domain;
- disabling the plurality of the clock domains, except the loop clock domain, when the computing device is in a tight loop so as to reduce power consumption by the computing device;
- disabling a branch address generator when the computing device is in a tight loop, thereby further reducing power consumption in the computing device;
- disabling the Icache when the computing device is in a tight loop;
- and
- monitoring a loop counter through the loop clock domain to detect if the tight loop has ended, wherein the tight loop has ended if the loop counter has reached zero.
Dependencies are inferred from the claim text.