Data processing device with branch prediction mechanism
AssigneeFujitsu Limited
InventorMasaki Ukai
Life of this patent
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Abstract
Phantom entries of entries in a branch history are completely detected using a flag identifying a phantom and a flag detecting the misalignment between the address of an instruction and an address where a branch has been predicted, which are provided for a queue executing branch instruction and controlling a phantom, and if the entries are not needed, they are erased. If there is an instruction that branches control flow, a phantom entry is intentionally created and instruction pre-fetching is applied to the entry.
Claims8
A data processing device with a branch prediction mechanism, comprising:
- a judgment unit judging whether a target instruction is a branch instruction;
- and
- a phantom erasure unit erasing a branch prediction entry corresponding to an instruction to be stored in the branch prediction mechanism if it is judged that the target instruction is not a branch instruction.
A data processing device with a branch prediction mechanism, comprising:
- a queue unit decoding an instruction and issuing it for execution;
- a detection unit judging whether an instruction for where a branch has been predicted falls on a boundary of an instruction word stored in the queue unit when the branch has been predicted for the instruction stored in the queue unit;
- and
- a misalignment erasure unit erasing a branch prediction entry to be stored in the branch prediction mechanism on which the branch prediction is based, if it is judged that the instruction for which where a branch has been predicted does not fall on a boundary of an instruction word.
A data processing device with a branch prediction mechanism, comprising:
- a phantom target instruction detection unit detecting a branch instruction that is not executed at high speed or a non-branch instruction that branches control flow;
- and
- a phantom entry generation unit creating a branch prediction entry in a branch prediction mechanism, based on an entry corresponding to the instruction detected by the phantom target instruction detection unit and adding it to a branch history,
- wherein instruction process speed is improved by performing instruction pre-fetching using the branch prediction entry.
A method for erasing an unnecessary entry of branch prediction entries in a data processing device with a branch prediction mechanism, comprising:
- judging whether a target instruction is a branch instruction;
- and
- erasing a branch prediction entry corresponding to an instruction stored in the branch prediction mechanism if it is judged that the target instruction is not a branch instruction.
A method for erasing an unnecessary entry of branch prediction entries in a data processing device with a branch prediction mechanism, comprising:
- decoding an instruction and issuing it for execution;
- judging whether a target instruction falls on a boundary of the instruction word stored in the queue step when a branch is predicted for the instruction stored in the decoding and issuing step;
- and
- erasing a branch prediction entry to be stored in a branch prediction mechanism on which the branch prediction is based, if it is judged that the target instruction does not fall on a boundary of an instruction word.
A method for processing instructions at high speed in a data processing device with a branch prediction mechanism, comprising:
- detecting a branch instruction that is not executed at high speed or a non-branch instruction that branches control flow;
- and
- creating a branch prediction entry to be stored in the branch prediction mechanism, based on an entry corresponding to the instruction detected in the detection step and adding it to the branch history,
- wherein instruction process speed is improved by performing instruction pre-fetching using the branch prediction entry.
Dependencies are inferred from the claim text.