Method and apparatus for executing low power validations for high confidence speculations
OwnerEvgeni Krimer, Bishara Shomar +2inventors
InventorsEvgeni Krimer, Bishara Shomar, Ronny Ronen, Doron Orenstein
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Abstract
A method and apparatus for executing low power validations for high confidence predictions. More particularly, the present invention pertains to using confidence levels of speculative executions to decrease power consumption of a processor without affecting its performance. Non-critical instructions, or those instructions whose prediction, rather than verification, lie on the critical path, can thus be optimized to consume less power.
Claims28
A method of processing a speculative instruction in a processing system, comprising:
- determining a confidence level for said speculative instruction;
- and
- scheduling said speculative instruction for execution in a low power device of said processing system.
A method of executing a speculative instruction in a processing system, comprising:
- determining a confidence level for said speculative instruction;
- determining whether said speculative instruction is in a critical path of said set of instructions;
- determining a set of dependencies of said speculative instruction;
- and
- executing said speculative instruction and said set of dependencies in a set of execution pipes based on said confidence level and critical path.
A processing system comprising:
- a branch predictor;
- a confidence mechanism coupled to said branch predictor to generate a confidence level signal for a corresponding branch prediction;
- a critical path calculation unit coupled to said branch predictor to determine a set of dependencies for said branch prediction and whether said branch prediction is in a critical path of a set of instructions;
- a scheduler coupled to said critical path calculation unit to organize said branch prediction and said set of dependencies for execution in a set of execution pipes associated with said confidence level, wherein said set of execution pipes includes:
- a first set of execution pipelines optimized for low power consumption;
- and
- a second set of execution pipelines optimized for fast execution.
A processing system comprising:
- an external memory unit;
- an instruction fetch unit coupled to said memory unit to fetch instructions from said memory unit;
- a branch predictor coupled to said instruction fetch unit;
- a confidence mechanism coupled to said branch predictor to generate a confidence level signal for a corresponding branch prediction;
- a critical path calculation unit coupled to said branch predictor to determine a set of dependencies for said branch prediction and whether said branch prediction is in a critical path of a set of instructions;
- a scheduler coupled to said critical path calculation unit to organize said branch prediction and said set of dependencies for execution in a set of execution pipes associated with said confidence level, wherein said set of execution pipes includes:
- a first set of execution pipelines optimized for low power consumption;
- and
- a second set of execution pipelines optimized for fast execution.
A set of instructions residing in a storage medium, said set of instructions capable of being executed by a processor to implement a method to execute a speculative instruction in a low power device of a processing system, the method comprising:
- determining a confidence level for said speculative instruction;
- and
- scheduling said speculative instruction for execution in said low power device.
Dependencies are inferred from the claim text.