Hardware accelerator for a platform-independent code

An information processing device comprising:

• an instruction input part for receiving the first or second format instructions;
• a register file including a plurality of registers;
• an instruction execution part for executing the first format instructions as their corresponding instructions using the register file;
• an instruction translator logic for translating the second format instruction into the first format instructions, when the instruction input part receives them, and supplying the translated instructions to the instruction execution part;
• and
• data transfer paths for transferring data between the instruction translator logic and the register file.

A mobile information system comprising:

• an antenna;
• a first information processing device for coding signals received from the antenna;
• a first main memory connected to the first information processing device;
• a second information processing device having plural registers, an instruction execution part for performing first format instructions using the registers, and an instruction translator logic, which can access the first main memory;
• and
• a second main memory connected to the second information processing device,
• the information processing device providing a first operation mode, in which the instruction translator logic translates a first group of instructions in second format instructions into the first format instructions when a program written in the second format, which is transferred to the first main memory via the antenna is executed and
• a second operation mode, in which the translation software described by the second format instructions translates a second group of instructions out of the second format instructions into the first format instructions for execution,
• wherein when the operation mode is switched between the first and second operation modes, switching between the operation modes is performed in parallel with the data transfer operation between the plurality of registers and the instruction translator logic.