Method for aligning stored data
AssigneeFujitsu Limited
InventorsTakashi Miura, Iwao Yamazaki
Life of this patent
Estimating the term…
Abstract
An arithmetic unit performs an arithmetic operation, and outputs data obtained as a result of the arithmetic operation. The data output from the arithmetic unit is stored in a store buffer. The data read from the store buffer is stored in cache memory. A first alignment circuit allows an alignment circuit to realign the data output from the arithmetic unit and stored in the store buffer, and the second alignment circuit realigns data read from the store buffer and stored in the cache memory.
Claims10
A data processing device, comprising:
- an arithmetic unit performing an arithmetic operation at an instruction and outputting data obtained as a result of the arithmetic operation;
- a first storage unit storing data output from said arithmetic unit;
- a second storage unit functioning as cache memory storing the data read from said first storage unit;
- a first data alignment unit realigning data output from said arithmetic unit and stored in said first storage unit;
- and
- a second data alignment unit realigning the data read by said first storage unit and stored in said second storage unit.
A data processing device, comprising:
- arithmetic means for performing an arithmetic operation at an instruction and outputting data obtained as a result of the arithmetic operation;
- first storage means for storing data output from said arithmetic means;
- second storage means for functioning as cache memory storing the data read from said first storage means;
- first data alignment means for realigning data output from said arithmetic means and stored in said first storage means;
- and
- second data alignment means for realigning the data read by said first storage means and stored in said second storage mans.
A method for aligning stored data for use with a data processing device, comprising:
- realigning data output as a result of an arithmetic from an arithmetic unit, provided in the data processing device, for performing an arithmetic at an instruction, and stored in a first storage unit;
- and
- realigning data read from the first storage unit, and stored in a second storage unit functioning as cache memory in the data processing device.
- according to claim 10, wherein:
- when data stored in said second storage unit is realigned, the data is realigned according to information about an inspection specifying an endian when the data is stored in said second storage unit;
- and
- when data stored in said first storage unit is realigned, the data is realigned according to word length information about a word length of the data when the data is stored in said first storage unit, and location information about a position of the data in the storage area in said first storage unit in which the data is located when the data is stored in said first storage unit, and the data can be copied to a position in which the original data is not located in the storage area according to the word length information and the location information.
Dependencies are inferred from the claim text.