Method and apparatus for enhanced phase alignment for direct access storage device (DASD)

Abstract

A method and apparatus are provided for implementing improved phase alignment in a direct access storage device (DASD). A reference clock input is received for providing a system clock. Locking to a synchronization field of a readback signal is performed by adjusting the phase of the system clock. A timing mark is detected and then the adjusted phase of the system clock is held. Responsive to the detected timing mark, a reference delay of a predefined number and fraction of system clock periods is identified. At an end of the reference delay, a write circuit accepts data and generates write signals for a write operation. The phase of the system clock is adjusted corresponding to a predefined fractional delay and is used to run a programmable counter that counts the predefined number of system clock periods corresponding to the reference delay. Modifying the system clock phase corresponding to the predefined fractional delay enables a higher granularity in delay than one clock period. Measurement of the time between detected consecutive timing marks is provided by a counter that starts counting system clock periods when a timing mark is detected and continues until a next timing mark is detected. The number of system clock periods since detecting a previous timing mark and the current adjusted phase of the system clock are stored.

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