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AssigneeAdvanced Micro Devices, Inc.
InventorsRene Rollig, Jens Meyer, Frank Barth, Alexander Krebs
Estimating the term…
An on-chip event timer apparatus including a hardware timer and a debug interface. The hardware timer includes at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up-counter's count value matches the count value of the match register. The debug interface includes enable control unit for enabling the up-counter's operation based on a pre-defined relationship between a state of an enabled signal supplied to said up-counter and an internal state of the hardware timer. Additionally, the debug interface may comprise a clock divider connected to the enable control unit to reduce the clock's frequency in accordance with a pre-programmed divider value. Based on the received clock with the reduced clock frequency, the enable control unit adapts the up-counter's processing speed to the reduced clock frequency.
An event timer apparatus comprising a hardware timer, including at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up-counter's count value matches the count value of the match register, and comprising a debug interface including an enable control unit for enabling the up-counter's operation based on a pre-defined relationship between a state of an enable signal supplied to said up counter and an internal state of the hardware timer.
A debug interface for use with an event timer apparatus which comprises a hardware timer, including at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up-counter's count value matches the count value of the match register, said debug interface comprising an enable control unit for enabling the up-counter's operation based on a pre-defined relationship between a state of an enable signal for said up-counter's operation and an internal state of the hardware timer.
A method for debugging the operation of an event timer, said event timer comprising a hardware timer including at least an up-counter for counting clocks of a clock signal, a match register for storing a programmable count value, and a comparator for monitoring whether the up counter's count value matches the count value of the match register, said method comprising the steps of:
Dependencies are inferred from the claim text.