Hardware-operation description conversion method and program therefor
AssigneeKabushiki Kaisha Toshiba
InventorsTakashi Akiba, Masato Igarashi
Life of this patent
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AssigneeKabushiki Kaisha Toshiba
InventorsTakashi Akiba, Masato Igarashi
Estimating the term…
Averilog-HDL source at the register-transfer level (RTL) is converted into a programming language executable on computer. Constructed in an analyzing of elements is a data structure corresponding to the elements of the verilog-HDL source. Created in an analyzing of a data-flow are a first data flow from a state register and a second flow from data-path register. Reconstructed in a reconstructing of a control-structure is the first data flow. Reconstructed in a reconstructing of a data-path is the second data flow so that the reconstructed second data is constituted only by circuitry operating in each state of the control structure. Each reconstructed data flow is mapped in each state of the control structure in a combining of the control-structure/data-flow, to output an behavior-level intermediate language. The intermediate language is converted into a programming language in a generating of an object-code.
A method of converting RTL description to a computer-executable program language by a computer, the RTL description describing hardware, the hardware including a controller and a data path, the controller having a state register and a first combinational circuitry, the data path having a data-path register controlled by a control signal from the controller and a second combinational circuitry, the computer functioning as an element analyzer, a data-flow analyzer, a control-structure reconstructer, a data-flow reconstructer, a control-structure/data-flow combiner and an object-code generator, the method comprising:
A computer program executable on computer for hardware-operation description conversion of RTL description describing hardware, the hardware including a controller and a data path, the controller having a state register and a first combinational circuitry, and the data path having a data-path register controlled by a control signal from the controller and a second combinational circuitry, comprising:
Dependencies are inferred from the claim text.