Method and apparatus for compiler assisted power management
AssigneeIntel Corporation
InventorsTomm Aldridge, Devadatta V. Bodas
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AssigneeIntel Corporation
InventorsTomm Aldridge, Devadatta V. Bodas
Estimating the term…
A method and apparatus for a compiler, or similar computer language translating device, to translate a computer language into a sequence of electronic instructions to be executed at run-time by at least one functional unit in a computer. At compile time, the compiler creates and analyzes the sequential order of the electronic instructions to determine exact moments when the functional unit will begin to, or complete, executing the electronic instructions. Consequently, the compiler can predict time intervals when the functional unit will be in use, or idling between instructions. In addition, the compiler knows the delay time, or latency, involved in powering up and powering down the functional unit. The compiler compares the use times, or idle times, to the latency, and creates power-controlling instructions to be embedded into the sequence of electronic instructions. The power-controlling instructions are to control power to the functional units at run-time.
An electronic instruction translator with power management, comprising:
A method comprising:
A method, comprising:
A system, comprising:
A computer readable storage medium containing executable computer program instructions which when executed cause an electronic instruction translator to perform a method comprising:
Dependencies are inferred from the claim text.