US 2004/0002316 A1 · Method of calibrating PLL frequency synthesizers to precise frequencies with low tolerance crystals in their master reference oscillators

Abstract

A frequency tracking circuit and method comprising a master crystal oscillator circuit is used for frequency tracking between a handset and a base station comprising a calibration subsystem for taking a temperature measurement, a reference control circuit for determining a numerical value needed to align a handset frequency with a base station frequency, an adder for adding the numerical value to a previous numerical value determined by the reference control circuit, a latch for latching the output of the adder, and a low precision master crystal oscillator for clocking the frequency of the latch. The most significant bit from the latch is input into a phase/frequency detector for forcing a voltage controlled oscillator to track a desired frequency.

Claims24

Dependent claims

A master crystal oscillator circuit for use in frequency tracking between a transmitter and a receiver comprising:

a reference control circuit to determine a numerical value needed to align a receiver frequency with a transmitter frequency;
an adder to add said numerical value to a previous numerical value determined by said reference control circuit;
a latch receiving an output of said adder;
and
a low precision master crystal oscillator to clock a frequency of said latch.

2 more elements

Dependencies are inferred from the claim text.

Method of calibrating PLL frequency synthesizers to precise frequencies with low tolerance crystals in their master reference oscillators

Life of this patent

Method of calibrating PLL frequency synthesizers to precise frequencies with low tolerance crystals in their master reference oscillators

Life of this patent

Abstract

Claims24