Back to results
US 2004/0002212 A1Published application
Method for forming copper metal line in semiconductor device
AssigneeHynix Semiconductor Inc.
InventorKyeong Keun Choi
Life of this patent
Estimating the term…
Abstract
The present invention relates to a method of forming a copper metal line in a semiconductor device. A via plug and a copper metal line are independently formed using a single damascene process. A buffer film is formed between the via plug and the copper metal line. It is thus possible to prevent lowering in the yield of a via hole that occurs due to a thermal stress in a subsequent process and diffusion of Cu atoms. Therefore, the yield of the copper metal line can be improved.
Claims5
A method of forming a copper metal line, comprising the steps of:
- (a) forming a first interlayer insulating film on a semiconductor substrate in which a lower layer is formed;
- (b) forming an etch stop layer on the first interlayer insulating film;
- (c) etching the etch stop layer and the first interlayer insulating film to form a via hole;
- (d) forming a via plug to bury the via hole;
- (e) forming a buffer film covering the via plug in order to buffer a stress applied in a subsequent process;
- (f) forming a second interlayer insulating film on the entire structure;
- (g) etching the second interlayer insulating film to form a trench through which the buffer film is exposed;
- and
- (h) forming a copper metal line to bury the trench.
6 more elements
Dependencies are inferred from the claim text.