Method of forming capacitor in semiconductor device by using a polysilicon pattern in a trapezoid shape

Abstract

The present invention relates to a method for forming a capacitor improved on reliability of a process in a highly integrated semiconductor device. To achieve this effect, the present invention includes: forming an inter-layer insulating layer on a substrate; forming a capacitor insulating layer as high as to form a capacitor on the inter-layer insulating layer; forming a polysilicon pattern for a hard mask in a trapezoid shape on the capacitor insulating layer; removing the capacitor insulating layer located in an area providing a capacitor by using the polysilicon pattern for the hard mask as an etch barrier so as to form a capacitor hole; forming a lower electrode within the capacitor hole; and forming a dielectric thin film and an upper electrode on the lower electrode.

Dependencies are inferred from the claim text.