Embedding a JTAG host controller into an FPGA design
AssigneeTexas Instruments Incorporated
InventorDouglas Albert Wescott
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Abstract
A method for embedding a Joint Test Action Group (JTAG) standard IEEE 1149.1 host controller into a field programmable gate array (FPGA) for platform development and DSP programming, and boundary scan of targeted hardware using JTAG commands and architecture is described. The FPGA-based JTAG host controller is bussed directly into the FPGA core, bypassing the board's JTAG communication port.
Claims13
A system for configuring a field programmable gate array (FPGA) to interface with target hardware device using JTAG architecture, comprising:
- an FPGA located on a printed circuit board;
- a memory array embedded in the FPGA;
- a JTAG logic interface in the FPGA for communicating JTAG instructions to JTAG ports of target hardware;
- a communications driver in the FPGA for interfacing with a communications bus from an external computer.
A method for configuring a field programmable gate array (FPGA) to communicate with a target hardware device using JTAG architecture, comprising:
- forming an embedded JTAG host controller on a printed circuit board by placing an FPGA on a printed circuit board;
- a memory array embedded in the FPGA;
- communicating JTAG instructions to JTAG ports of target hardware through a JTAG logic interface in the FPGA;
- interfacing with a communications bus from an external computer via a communications driver in the FPGA.
Dependencies are inferred from the claim text.