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US 2004/0000939 A1Published application
Clock generation circuit and clock conversion circuit
AssigneeSony Corporation
InventorTetsumasa Meguro
Life of this patent
Estimating the term…
Abstract
A clock generation circuit for generating clocks having a plurality of frequencies by which a suitable frequency to each of tasks can be supplied and the power consumption is reduced, comprising a clock generation unit for generating a clock with a constant frequency, a counter operating in synchronization with the clock for counting pulses of the clock, a comparator for comparing a counter value of the counter with the number of pulses of a clock having a desired frequency, and an output gate for controlling supply and stop of pulses of the clock input from the clock generation unit based on a comparison result of the comparator.
Claims20
A clock generation circuit, comprising:
- a clock generation unit for generating a clock with a constant frequency;
- a counter operating in synchronization with said clock for counting pulses of the clock;
- a comparator for comparing a counter value of said counter with the number of pulses of a clock having a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said clock input from said clock generation unit based on a comparison result of said comparator.
2 more elements
A clock generation circuit, comprising:
- a clock generation unit for generating a clock with a constant frequency;
- a counter operating in synchronization with said clock for counting pulses of the clock;
- a conversion circuit for performing data conversion on the counter value of said counter and outputting the same;
- a comparator for comparing an output value of said conversion circuit with the number of pulses of a clock having a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said clock input from said clock generation unit based on a comparison result of said comparator.
3 more elements
A clock generation circuit, comprising:
- a clock generation unit for generating a clock with a constant frequency;
- a first counter for counting in synchronization with said clock;
- a second counter for counting in synchronization with said clock every time said first counter overflows;
- a comparator for comparing the counter value of said second counter with a value corresponding to a frequency difference between a frequency of said clock and a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said clock based on a comparison result of said comparator and outputting a clock whose frequency has gotten same as the desired frequency.
3 more elements
A clock generation circuit, comprising:
- a clock generation unit for generating a clock with a constant frequency;
- a first counter for counting in synchronization with said clock;
- a second counter for counting in synchronization with said clock every time said first counter overflows;
- a conversion circuit for performing data conversion on a counter value of said second counter and outputting the same;
- a comparator for comparing an output value of said conversion circuit with a value corresponding to a frequency difference between a frequency of said clock and a desired frequency every time said first counter overflows;
- and
- an output gate for controlling supply and stop of pulses of said clock based on a comparison results of said comparator and outputting a clock whose frequency has gotten same as the desired frequency.
4 more elements
A clock conversion circuit, comprising:
- a counter operating in synchronization with an input clock for counting pulses of the clock;
- a comparator for comparing a counter value of said counter with the number of pulses of a clock having a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said input clock based on a comparison result of said comparator.
1 more element
A clock conversion circuit, comprising:
- a counter operating in synchronization with an input clock for counting pulses of the clock;
- a conversion circuit for performing data conversion on a counter value of said counter and outputting the same;
- a comparator for comparing an output value of said conversion circuit with the number of pulses of a clock having a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said input clock based on a comparison result of said comparator.
2 more elements
A clock conversion circuit, comprising:
- a first counter for counting in synchronization with an input clock;
- a second counter for counting in synchronization with said clock every time said first counter overflows;
- a comparator for comparing a counter value of said second counter with a value corresponding to a frequency difference between a frequency of said clock and a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said clock based on a comparison result of said comparator and outputting a clock whose frequency has gotten same as the desired frequency.
2 more elements
A clock conversion circuit, comprising:
- a first counter for counting in synchronization with an input clock;
- a second counter for counting in synchronization with said clock every time said first counter overflows;
- a conversion circuit for performing data conversion on the counter value of said second counter and outputting the same;
- a comparator for comparing an output value of said conversion circuit with a value corresponding to a frequency difference between a frequency of said clock and a desired frequency;
- and
- an output gate for controlling supply and stop of pulses of said clock based on a comparison result of said comparator and outputting a clock whose frequency has gotten same as the desired frequency.
3 more elements
Dependencies are inferred from the claim text.