Digital summing phase-lock loop circuit with sideband control and method therefor
AssigneeComtech EF Data Corp.
InventorsRobert L. McCollum, James W. Taylor
Life of this patent
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Abstract
A digital summing phase-lock loop circuit with sideband control provides high accuracy and high speed acquisition in a multi-loop frequency synthesizer. A digital phase comparator is used to control a voltage-controlled oscillator in response to inputs from multiple external loops. An initial sweep condition is set by a sweep control circuit to provide resolution of lock ambiguities in the multiple external loops. Sideband selection may be performed by selecting on of an inverted or non-inverted output of the digital phase comparator.
Claims19
A phase-lock control circuit, comprising:
- a digital phase comparator having a first input and a second input for coupling to multiple external frequency sources;
- a loop filter coupled to an output of the phase comparator for generating a frequency control output;
- and
- and a sweep control circuit for resolving lock ambiguities in the multiple external frequency source by setting an initial sweep direction of the loop filter.
A frequency synthesizer, comprising:
- a voltage-controlled oscillator for generating an output of said synthesizer;
- a first loop for generating a coarse frequency output;
- a second loop for generating a fine frequency output, wherein said fine frequency output is a difference between a frequency of said output of said synthesizer and a frequency of said coarse frequency output;
- a mixer coupled to said output of said synthesizer and an output said first loop for producing a fine frequency comparison signal;
- and
- a phase-lock control circuit including a digital phase comparator and a loop filter for producing a control voltage coupled to an input of said voltage-controlled oscillator.
A method for generating a frequency control voltage for a voltage-controlled oscillator, comprising:
- digitally comparing outputs of multiple frequency sources to determine at least one phase-correction signal;
- filtering said phase-correction signal to generate said frequency control voltage;
- and
- setting an initial sweep direction of said frequency control voltage for resolving lock ambiguities between said multiple frequency sources.
Dependencies are inferred from the claim text.