Multiphase synchronous buck converter with improved power loss balancing
AssigneeInternational Rectifier Corporation
InventorJason Zhang
Life of this patent
Estimating the term…
Abstract
A multi-phase synchronous buck converter having plural single phase synchronous buck converter stages, connected together to provide an output current to a load. A sensing circuit in each converter stage includes a variable gain current sense amplifier that determines the current through the shunt MOSFET to generate an output signal representative of the output current provided by that converter stage. The gains of the current sense amplifiers in each converter stage are preset such that the output signals from all the amplifiers are substantially equal, thereby balancing the power loss in all the converter stages by adjustment of the output currents using varying current sense gains to compensate for variations in the RDS-ON of the shunt MOSFETS.
Claims20
A multi-phase synchronous buck converter comprising:
- a plurality of single phase buck converter stages, each stage including:
- a first switching transistor connected between an input node and a first node;
- a second switching transistor connected between the first node and a second node;
- a series inductor connected between the first or second node and an output node;
- a capacitor connected between the output node and the second node,
- the output nodes of all the individual converter stages being connected together to provide an output current to a load which is contributed to by all the converter stages;
- a drive circuit which is operative to turn the first and second switching transistors on and off according to a variable duty cycle thereby to regulate the voltage at the output node;
- and
- a sensing circuit including a variable gain current sense amplifier operative to determine the current through a selected one of the switching transistors when it is conducting thereby to generate an output signal representative of the output current provided by that converter stage;
- and
- a master controller operative to provide duty cycle control signals in a predetermined phase relationship for the switching transistors of the individual converter stages according to the difference between the output voltage from the multi-phase converter and a reference signal representing a desired voltage at the output node;
- the gains of the current sense amplifiers in each converter stage being preset such that the output signals from all the amplifiers are substantially equal, thereby balancing the power loss in all the converter stages by adjustment of the output currents using varying current sense gains to compensate for variations in the conductive path resistance of the selected switching transistors.
A method of providing balanced power loss in a multi-phase synchronous buck converter comprising a plurality of single phase buck converter stages having outputs connected together to contribute to an output current, each stage including first and second switching transistors which provide output current to an output node, a series inductor and a shunt capacitor connected to the output node, a drive circuit which turns the first and second switching transistors on and off according to a variable duty cycle to regulate the voltage at the output node, and a sensing circuit including a variable gain current sense amplifier, a master controller operative to provide duty cycle control signals in a predetermined phase relationship for the switching transistors of all of the converter stages according to the difference between the output voltage from the multi-phase converter and a reference signal representing a desired voltage at the output node;
- the method comprising the steps of
- presetting the gains of the current sense amplifiers in each converter stage such that they all provide substantially equal outputs in response to a predetermined calibration current through a selected one of the switching transistors when in its conductive state;
- and
- determining the current through the respective selected switching transistors when they are conducting to generate a current sense amplifier output signals representative of the output current provided by the respective converter stages.
Dependencies are inferred from the claim text.