Semiconductor device, semiconductor package, and method for testing semiconductor device

A semiconductor device comprising at least two semiconductor chips, each having a plurality of internal terminals with the internal terminals of the two semiconductor chips connected to one another by a plurality of wires, each of the semiconductor chips including:

• at least one redundant terminal;
• a test circuit for detecting whether there is an internal terminal causing a connection flaw and for generating a plurality of test signals, each corresponding to one of the plurality of internal terminals;
• and
• a switching circuit unit for switching a first set of the plurality of internal terminals including the internal terminal causing a connection flaw to a second set of the plurality of internal terminals excluding the internal terminal causing a connection flaw and the at least one redundant terminal.

A semiconductor device comprising at least two semiconductor chips, each having a plurality of internal terminals, each of the semiconductor chips including:

• at least one redundant terminal;
• a test circuit for detecting whether there is an internal terminal causing a connection flaw and for generating a plurality of test signals, each corresponding to one of the plurality of internal terminals;
• and
• a switching circuit unit for switching the internal terminal causing a connection flaw to the at least one redundant terminal.

A semiconductor device comprising:

• two semiconductor chips, each having a plurality of internal terminals, a first external terminal, and a second external terminal, the plurality of internal terminals including a first internal terminal adjacent to the first external terminal, and a second internal terminal adjacent to the second external terminal with the internal terminals of the two semiconductor chips connected to one another by a plurality of wires, each of the semiconductor chips including:
• at least one redundant terminal;
• a test circuit for detecting whether there is an internal terminal causing a connection flaw and for generating a plurality of test signals, each corresponding to one of the plurality of internal terminals;
• and
• a switching circuit unit for switching a first set of the plurality of internal terminals including the internal terminal causing a connection flaw to a second set of the plurality of internal terminals excluding the internal terminal causing a connection flaw and the at least one redundant;
• an intermediate switch device connected between the plurality of internal terminals so that the plurality of wires and the internal terminals are connected in series;
• a first end switch device connected between the first internal terminal and the first external terminal;
• and
• a second end switch device connected between the second internal terminal and the second external terminal.

A semiconductor device comprising:

• at least two semiconductor chips, each having a plurality of internal terminals, a first external terminal, and a second external terminal, the plurality of internal terminals include a first internal terminal adjacent to the first external terminal and a second internal terminal adjacent to the second external terminal, each of the semiconductor chips including:
• at least one redundant terminal;
• a test circuit for detecting whether there is an internal terminal causing a connection flaw and for generating a plurality of test signals, each corresponding to one of the plurality of internal terminals;
• and
• a switching circuit unit for switching the internal terminal causing a connection flaw to the at least one redundant terminal;
• an intermediate switch device connected between the plurality of internal terminals so that the plurality of wires and the internal terminals are connected in series;
• a first end switch device connected between the first internal terminal and the first external terminal;
• and
• a second end switch device connected between the second internal terminal and the second external terminal.

A semiconductor package comprising a semiconductor device, the semiconductor device including:

• a plurality of semiconductor chips connected to each other by a plurality of wires with each of the semiconductor chips including a plurality of internal terminals connected to the plurality of wires;
• an intermediate switch device connected between the plurality of internal terminals so that the plurality of wires and the internal terminals are connected in series;
• a first end switch device connected between the first internal terminal and the first external terminal;
• and
• a second end switch device connected between the second internal terminal and the second external terminal.

A semiconductor package comprising a semiconductor device including at least two semiconductor chips, each semiconductor chip comprising:

• a plurality of internal terminals with the internal terminals of the two semiconductor chips connected to one another by a plurality of wires;
• at least one redundant terminal;
• a test circuit for detecting whether there is an internal terminal causing a connection flaw and for generating a plurality of test signals, each corresponding to one of the plurality of internal terminals;
• and
• a switching circuit unit for switching a first set of the plurality of internal terminals including the internal terminal causing a connection flaw to a second set of the plurality of internal terminals excluding the internal terminal causing a connection flaw and the at least one redundant terminal.

A method for testing a semiconductor device, wherein the semiconductor device includes a plurality of semiconductor chips connected to each other by a plurality of wires, each of the semiconductor chips including an external terminal and a plurality of internal terminals connected to the plurality of wires, the method comprising the steps of:

• connecting the wires and the internal terminals in series;
• connecting a first end switch device between the first internal terminal and the first external terminal;
• and
• connecting a second end switch device between the second internal terminal and the second external terminal;
• and
• testing conduction between the first external terminal and the second external terminal.

A semiconductor device comprising:

• a plurality of semiconductor chips including a first semiconductor chip and a second semiconductor chip, the first semiconductor chip including a plurality of first internal terminals and an external terminal, and the second semiconductor chip including a plurality of second internal terminals and an external terminal;
• a plurality of wires connecting the first internal terminals and the second internal terminals;
• and
• a plurality of switch devices arranged on each of the first and second semiconductor chips to connect the first internal terminals, the second internal terminals, and the wires in series between the two external terminals.

A semiconductor device comprising:

• a first semiconductor chip;
• a second semiconductor chip connected to the first semiconductor chip by a plurality of wires, wherein each of the first and second semiconductor chips include;
• a plurality of input/output terminals;
• a plurality of internal terminals, each associated with the plurality of the input/output terminals;
• at least one redundant terminal, wherein the at least one redundant terminal and the internal terminals are connected to the wires, and the number of redundant terminals of the first semiconductor chip is the same as the number of redundant terminals of the second semiconductor chip;
• a test circuit for detecting an internal terminal causing a connection flaw from the plurality of internal terminals;
• and
• a switching circuit unit for connecting the input/output terminals to the internal terminals excluding the internal terminal causing a connection flaw and to the at least one redundant terminal when detecting the internal terminal causing a connection flaw.