Process for creating vias for circuit assemblies
AssigneePPG Industries Ohio, Inc.
InventorsAlan E. Wang, Kevin C. Olson
Life of this patent
Estimating the term…
Abstract
Provided is a process for creating vias for a circuit assembly including the steps of (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon; (b) applying a resist over the uncured coating; (c) imaging the resist in predetermined locations; (d) developing the resist to expose predetermined areas of the uncured coating; (e) removing the exposed areas of the uncured coating; and (f heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating. Also disclosed is a process of fabricating a circuit assembly.
Claims59
A process for exposing predetermined areas of a substrate comprising the following steps:
- (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon;
- (b) applying a resist over said uncured coating;
- (c) imaging said resist in predetermined locations;
- (d) developing said resist to expose predetermined areas of the uncured coating;
- (e) removing the exposed areas of the uncured coating;
- and
- (f) heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating.
A process for fabricating a multi-layer electrical circuit assembly comprising the following steps:
- (a) applying a curable coating composition to a substrate, some or all of which is electrically conductive, to form an uncured coating thereon;
- (b) applying a resist over said uncured coating;
- (c) imaging said resist in predetermined locations;
- (d) developing said resist to expose predetermined areas of the uncured coating;
- (e) removing the exposed areas of the uncured coating to form a via;
- (f) heating the coated substrate of step (e) to a temperature and for a time sufficient to cure the coating;
- (g) stripping the remaining resist;
- (h) applying a layer of metal to all surfaces;
- (i) applying a second resist to the layer of metal applied in step (h);
- (j) processing said second resist to form a predetermined pattern of exposed underlying metal;
- (k) etching said exposed metal;
- (l) stripping the remaining second resist;
- and
- (m) optionally repeating steps (a) through (l) one or more times to form multiple layers of interconnecting electrical circuit patterns.
Dependencies are inferred from the claim text.