Floorplanning apparatus deciding floor plan using logic seeds associated with hierarchical blocks

A floorplanning apparatus comprising:

• a seed position decision section for deciding, referring to circuit information about at least one hierarchical block to be placed on a semiconductor integrated circuit substrate, a placement position of a logic seed of each hierarchical block;
• a cell placement section for placing cells belonging to the hierarchical block around the placement position of the logic seed decided by said seed position decision section, referring to the circuit information about the hierarchical block corresponding to the logic seed;
• and
• a placement region decision section for deciding placement and routing regions of the hierarchical block considering cell placement results produced by said cell placement section.