Semiconductor integrated circuits, data transfer systems, and the method for data transfer
AssigneeKabushiki Kaisha Toshiba
InventorYoshio Kaneko
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit configured for connection to an external ROM includes a decryption code block storing a decryption code; a decoder circuit connected to the decryption code block and decrypting encrypted data such that the encrypted data can be stored in the external ROM, by utilizing the decryption code; a configuration circuit connected to the decoder circuit; an FPGA circuit connected to the configuration circuit, the circuit structure of the FPGA circuit determined by the configuration circuit; and an internal circuit connected to the FPGA circuit, the circuit operation of which is determined by the FPGA circuit.
Claims36
A semiconductor integrated circuit configured for connection to an external ROM comprising:
- a decryption code block storing a decryption code;
- a decoder circuit connected to the decryption code block and decrypting encrypted data such that the encrypted data can be stored in the external ROM, by utilizing the decryption code;
- a configuration circuit connected to the decoder circuit;
- an FPGA circuit connected to the configuration circuit, the circuit structure of the FPGA circuit determined by the configuration circuit;
- and
- an internal circuit connected to the FPGA circuit and the circuit operation of which is determined by the FPGA circuit.
A semiconductor integrated circuit configured for connection to an external ROM comprising:
- a decryption code block storing a decryption code;
- a decoder circuit connected to the decryption code block and decrypting encrypted software data such that the encrypted software data can be stored in the external ROM, by utilizing the decryption code;
- a CPU connected to the decoder circuit;
- and
- an internal circuit connected to the CPU and the circuit operation of the internal circuit determined by the CPU.
A data transfer system configured for connection to an external ROM comprising;
- a first integrated semiconductor chip integrating the first external ROM storing encrypted FPGA circuit design information;
- and
- a second integrated semiconductor chip comprising:
- a first decryption code block storing a decryption code;
- a first decoder circuit connected to the first decryption code block and decrypting encrypted data from the first external ROM by utilizing the decryption code;
- a configuration circuit connected to the first decoder circuit;
- an FPGA circuit connected to the configuration circuits the circuit structure of the FPGA circuit determined by the configuration circuit;
- and
- an internal circuit connected to the FPGA circuit, the circuit operation of the internal circuit determined by the FPGA circuit.
A data transfer system comprising;
- a first integrated semiconductor chip integrating a first external ROM storing encrypted CPU software design information;
- and
- a second integrated semiconductor chip comprising:
- a decryption code block storing a decryption code;
- a decoder circuit connected to the decryption code block and decrypting encrypted software data from the first external ROM by utilizing the decryption code;
- a CPU connected to the decoder circuit;
- and
- an internal circuit connected to the CPU, the circuit operation of the internal circuit determined by the CPU.
A method for data transfer comprising:
- storing a decryption code in a decryption code block of a semiconductor integrated circuit;
- writing encrypted ROM data to a fist external ROM;
- receiving the encrypted ROM data from the first external ROM and decoding the encrypted ROM data in a decoder circuit in the semiconductor integrated circuit;
- determining whether all of the encrypted ROM data stored in the external ROM has been transferred to and received in the decoder circuit or not;
- repeating the determining operation when all of the encrypted ROM data has not been transferred to and received in the decoder circuit;
- and
- shifting the FPGA circuit to a user mode and starting operation of the semiconductor integrated circuit, when all of the encrypted ROM data has been transferred to and received in the decoder circuit.
A method for data transfer comprising;
- storing a decryption code in a decryption code block in a semiconductor integrated circuit;
- writing encrypted ROM data to a first external ROM;
- requesting and determining a ROM address in the first external ROM by operation of a CPU in the semiconductor integrated circuit;
- decoding the encrypted ROM data in a decoder circuit in the semiconductor integrated circuit;
- and
- operating the CPU in response to decrypted ROM data.
Dependencies are inferred from the claim text.