Method and apparatus for simulating conditional branch instructions in a simulator which implies binary translation
OwnerIgor Liokumovich, Rinat Rappoport +2inventors
InventorsIgor Liokumovich, Rinat Rappoport, Konstantin Levit-Gurevich, Roman Fishtein
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Abstract
In an embodiment, a binary translator translates instructions from a simulated instruction set into instructions from a host instruction set for execution on a host processor. The binary translator may translate a simulated conditional branch instruction into a set of host branch instructions. The binary translator may substitute a host target address for a simulated target address in a selected host branch instruction for an in-page conditional branch instruction.
Claims19
A method comprising:
- translating a simulated conditional branch instruction into a plurality of host branch instructions;
- selecting one of said host branch instructions in response to a condition check, said selected host branch instruction including a simulated target address;
- translating the simulated target address into a host target address;
- and
- substituting the host target address for the simulated target address in the selected host branch instruction.
Apparatus comprising:
- a processor operative to execute a set of host instructions including host branch instructions;
- and
- a binary translator operative to translate a simulated conditional branch instruction into a plurality of host branch instructions and to substitute a host target address for a simulated target address in a selected branch instruction.
An article comprising a machine-readable medium including machine-executable instructions, the instructions operative to cause a machine to:
- translate a simulated conditional branch instruction into a plurality of host branch instructions;
- select one of said host branch instructions in response to a condition check, said selected host branch instruction including a simulated target address;
- translate the simulated target address into a host target address;
- and
- substitute the host target address for the simulated target address in the selected host branch instruction.
Dependencies are inferred from the claim text.