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US 2003/0227299 A1Published application
High speed differential receiver
AssigneeLightspeed Semiconductor Corporation
InventorsChit-Ah Mak, Bingda B. Wang, Eric West, Robert A. Olah
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Abstract
A differential receiver having a pair of cross-coupled signal conditioning devices improves transition time and data signal integrity. In an embodiment, the differential receiver includes two signal input nodes and a plurality of transistors, and two signal output nodes. The pair of cross-coupled signal conditioning devices are coupled to the transistors and function to reduce voltage swing between the two output nodes, thereby keeping the transistors in a saturation region.
Claims14
A differential receiver circuit comprising:
- a first signal input node;
- a second signal input node;
- a plurality of transistors, coupled with said first signal input node and said second signal input node;
- and,
- a signal conditioning device, coupled with said plurality of transistors.
2 more elements
A differential receiver circuit comprising:
- a first current source;
- a second current source;
- a first transistor of a first conductivity type having a source region coupled to said first current source, a drain region, and a gate;
- a second transistor of said first conductivity type having a source region coupled to said second current source, a source region, and a gate coupled to said gate of said first transistor;
- a third transistor of a second conductivity type having a drain region coupled to said drain region of said first transistor, a source region, and a gate;
- a fourth transistor of said second conductivity type having a drain region coupled to said drain region of said second transistor, a source region, and a gate coupled to said gate of said third transistor;
- a first signal conditioning device, having an input node coupled to said drain of said third transistor and the drain of said first transistor and an output node coupled to said drain of said fourth transistor and the drain of said second transistor;
- and
- a second signal conditioning device, having an input node coupled to said drain of said fourth transistor and the drain of said second transistor and an output node coupled to said drain of said third transistor and the drain of said first transistor.
6 more elements
Dependencies are inferred from the claim text.