Devices, systems and methods for conditional instructions notice

A data processing device comprising:

• memory means for storing instructions at different addresses;
• circuit means for executing electronic operations having status conditions wherein a particular set of the status conditions can occur in operation of the circuit means;
• means for temporarily holding the instructions successively, the instructions including a conditional branch instruction conditional on the particular set of the status conditions;
• means for generating addresses of said memory means in incremental sequence and initiating successive transfers of said instructions at the addresses respectively to said means for temporarily holding;
• and
• means, connected to said circuit means, for decoding said instructions to direct the electronic operations and further responsive to the conditional branch instruction for signaling said means for generating addresses to supply a branch address that departs from the incremental sequence when the particular set of the status conditions of said circuit are present.

A data processing device comprising:

• a memory for storing instructions;
• an instruction register;
• a program counter for holding an address of an instruction;
• a controller for transferring from said memory to said instruction register the instruction having the address held in said program counter;
• an accumulator;
• and
• a decoder connected to said accumulator and said instruction register to insert a branch address into said program counter depending on whether at least three bits of a particular instruction in said instruction register correspond to respective conditions occurring in said accumulator.

A data processing system comprising:

• an analog-to-digital converter;
• an electronic processor connected to said analog-to-digital converter and including an electronic computation unit for executing multiple-precision arithmetic and an accumulator having conditions including A) carry, B) overflow and C) contents relative to a predetermined number;
• an instruction register;
• and
• a decoder connected to said instruction register and said accumulator for branching when conditions of the accumulator selected by the contents of the instruction register actually occur.

A data processing device comprising:

• first circuit means for executing operations and having status conditions wherein a particular status condition cap occur in operation of the first circuit means;
• instruction register means for holding a conditional instruction directing the first circuit means to execute a further operation provided that the particular status condition is present;
• decoder means connected to said instruction register means and said first circuit means, for decoding the conditional instruction;
• and
• control circuit means, operative in response to said decoder means and connected to said first circuit means, for causing said first circuit means to execute the further operation when the particular status condition is present and otherwise to cause the first circuit means to omit the further operation.

A data processing system comprising:

• an analog-to-digital converter;
• an electronic processor connected to said analog-to-digital converter and including an electronic computation unit for executing operations and an accumulator having status conditions including A) carry, B) overflow and C) contents relative to a predetermined number wherein a particular one or more of the status conditions can occur in operation;
• an instruction register operative to hold a conditional instruction directing the electronic processor to execute a further operation provided the particular status condition is present;
• and
• a control circuit connected to said instruction register and said accumulator to cause said processor to execute the further operation when the conditional instruction and the particular status condition are present and otherwise to cause the electronic processor to omit the further operation when the conditional instruction is present and the particular status condition is absent.

A data processing device comprising:

• a first circuit having status condition lines wherein a particular set of status conditions can occur in operation of the circuit;
• an electronic memory having memory locations occupied by instructions at addresses of said memory;
• an instruction register connected to an output of said electronic memory;
• a program counter connected to address said electronic memory thereby to transfer a conditional instruction to said instruction register directing the first circuit to execute a further operation provided that the particular status condition is present;
• and
• a control circuit having logic circuitry with inputs connected to said instruction register and to said status condition lines from said first circuit, said control circuit further having an output connected to said first circuit to initiate the further operation by the first circuit when the status condition lines are active with the particular set of status conditions and otherwise to cause the first circuit to omit the further operation.