Processor Re-Start Control

2 The method of handling a restart of a first processor in a dual-processor system according to claim 1, the method further comprising the step of:

• blocking or buffering commands or instructions from said second processor during a re-configure and/or re-initialize operation of said first processor.

3 The method of handling a restart of a first processor in a dual-processor system according to claim 1 or claim 2, the method further comprising the steps of:

• handling communication to a communication network by said first processor;
• and/or
• handling man-machine interface operations by said second processor.

5 The processor-controlled device according to claim 4, wherein the device is a wireless communication device and said error manager intercepts a message from said first processor to said second processor that indicates a re-start operation of said first processor and said error manager blocks said message, thereby preventing said second processor from realizing that said first processor has re-started.

6 The processor-controlled device according to claim 4 or claim 5, wherein the error manager is configured to differentiate between a re-start operation of a processor and a switch ‘on’ operation of the processor-controlled device, such that if the first processor re-start operation relates to a switch ‘on’ operation, the error manager allows the second processor to configure an operation of the first processor.

7 The processor-controlled device according to claim 6, wherein the error manager is configured to block or buffer commands or instructions from said second processor during a re-configure and/or re-initialize operation of said first processor.

8 The processor-controlled device according to claim 4 or claim 5, wherein said first processor handles communication to a communication network, for example a GSM network, and/or said second processor handles man-machine interface operations.

10 The method of handling a restart of a first processor in a dual-processor system according to claim 9, the method further comprising the step of:

• blocking or buffering commands or instructions from said second processor during a re-configure and/or re-initialize operation of said first processor.

11 The method of handling a restart of a first processor in a dual-processor system according to claim 9 or claim 10, the method further comprising the steps of:

• handling communication to a communication network by said first processor;
• and/or
• handling man-machine interface operations by said second processor.

12 A processor-controlled wireless communication device comprising:

• a dual-processor system having a first processor performing a first set of functions and a second processor, operably coupled to said first processor, performing a second set of functions;
• and
• an error manager application, located between said first processor and said second processor, wherein said error manager intercepts a message from said first processor to said second processor that indicates a re-start operation of said first processor and blocks said message, thereby preventing said second processor from realizing that said first processor has re-started.

13 The processor-controlled wireless communication device according to claim 12, wherein the error manager is configured to differentiate between a re-start operation of a processor and a switch ‘on’ operation of the processor-controlled wireless communication device, such that if the first processor re-start operation relates to a switch ‘on’ operation, the error manager allows the second processor to configure an operation of the first processor.

14 The processor-controlled wireless communication device according to claim 12 or claim 13, wherein the error manager is configured to block or buffer commands or instructions from said second processor during a re-configure and/or re-initialize operation of said first processor.

15 The processor-controlled wireless communication device according to claim 12 or claim 13, wherein said first processor handles communication to a communication network, for example a GSM network, and/or said second processor handles man-machine interface operations.