Airgap for semiconductor devices

A method for forming a spacer between conductive members of a semiconductor device, comprising:

• depositing a dielectric layer on a substrate;
• forming features into the dielectric layer;
• filling the features with a conductive material;
• depositing a porous layer over the filled interconnect features and dielectric layer, the porous layer having an ordered pore structure;
• stripping the dielectric layer out of an area between the filled conductive interconnects through the porous layer to form an air gap between the conductive interconnects;
• and
• depositing a capping layer over the porous layer to seal the ordered pore structure.

A method for forming a spacer having a dielectric constant of about 1 between conductive features of a semiconductor device, comprising:

• depositing an amorphous carbon layer onto a substrate using a chemical vapor deposition process;
• etching features into the amorphous carbon layer;
• filling the features etched into the amorphous carbon layer with a conductive material using at least one of an electrochemical plating process, an electroless plating process, a physical vapor deposition process, and a chemical vapor deposition process;
• using a chemical mechanical polishing process to planarize an upper surface of the semiconductor device;
• depositing a porous oxide layer over the filled features and amorphous carbon layer;
• stripping the amorphous carbon layer from areas between conductive elements via a downstream hydrogen-based stripping process configured to remove the amorphous carbon layer through pores in the porous oxide layer, which operates to form an air gap between the conductive elements;
• and
• depositing a capping layer over the porous oxide layer to seal the pores.

A method for forming a low k spacer between conductive interconnect features formed into a dielectric layer on semiconductor substrate, comprising:

• depositing a porous layer over the interconnect features and dielectric layer;
• removing at least a portion the dielectric layer out of an area between the conductive interconnect features through the porous layer to form an air gap between the conductive interconnect features;
• and
• depositing a capping layer over the porous layer to seal the porous layer.