Event based IC test system

An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment, comprising:

• an event memory for storing event data derived directly from simulation of design data for an intended IC in the EDA environment wherein the event data to denote each event is formed with time index indicating a time length from a predetermined point and an event type indicating a type of change at an event;
• an event generation unit for generating test vectors based on the event data from the event memory where waveform of each vector is determined by the event type and a timing of the waveform is determined by accumulating the time index of previous events;
• and
• means for supplying test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.

An event based test system for testing an IC device under test (DUT) designed under an automatic electronic design (EDA) environment, comprising:

• a host computer for controlling an overall operation of the test system;
• interface software for interfacing the host computer and the event based test system, the interface software including graphic user interface (GUI) establishing an event viewer for monitoring and editing events for the test system;
• data interpretation and management software for interpreting and managing data from the host computer through the interface software;
• and
• event tester hardware having a plurality of event tester units for storing event data derived directly from logic simulation of design data and generating test vectors based on the event data and supplying the test vectors to the DUT and evaluating response outputs of the DUT at predetermined timings.