Synchronization symbol re-insertion for a decision feedback equalizer combined with a trellis decoder
AssigneeMicronas Semiconductors, Inc.
InventorsShidong Chen, Jilian Zhu, Xiaojun Yang
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Abstract
A digital equalizer for interpreting a digital signal including convolutionally encoded symbols and synchronization symbols outside the convolutional code comprises a combined trellis encoder and DFE. The synchronization symbols are re-inserted into the input of the DFE in order to restore time domain continuity created by removal of the synchronization symbols.
Claims10
A synchronization symbol re-inserter, comprising:
- a trellis decoder, comprising:
- a plurality of decoding stages, each decoding stage having as output intermediate decoded symbols;
- a mirrored symbol delay line, comprising:
- a plurality of 3:1 multiplexers, each having a multiplexer output, and each receiving as input the intermediate decoded symbols from a following stage of the trellis decoder, and the intermediate decoded symbols from a current stage of the trellis decoder;
- for each of the plurality of 3:1 multiplexers, a delay device receiving as input one of the plurality of multiplexer outputs, and having a delay output, the multiplexer output of each of the delay devices other than a final multiplexer being fed to a following 3:1 multiplexer.
A digital equalizer for interpreting a digital signal including convolutionally encoded symbols and synchronization symbols outside the convolutional code, the digital equalizer comprising a combined trellis encoder and DFE, wherein the synchronization symbols are re-inserted into the input of the DFE in order to restore time domain continuity created by removal of the synchronization symbols.
Dependencies are inferred from the claim text.