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US 2003/0214030 A1Published application
Breaking out signals from an integrated circuit footprint
AssigneeIntel Corporation
InventorDevadatta V. Bodas
Life of this patent
Estimating the term…
Abstract
Pads are arranged as an integrated circuit (IC) footprint, and are formed in a stackup that includes an insulating layer and multiple signal routing layers. The footprint has a polygonal shape. There is an inner pad region, a middle pad region that surrounds the inner pad region, and an outer pad region that surrounds the middle pad region. Some of the pads of each pad region are connected to a respective group of signal lines. Some of the signals that are connected to pads of the outer region which are located in a corner of the polygonal shape are routed out of the footprint in a different layer than the one used to route signal lines that are connected to pads of the outer region which are located between two adjacent corners of the polygonal shape.
Claims40
An article of manufacture comprising:
- an insulating layer between a plurality of signal routing layers;
- and
- a plurality of pads arranged as an integrated circuit footprint and formed in a stackup that includes the insulating layer and the plurality of signal layers, the footprint having a polygonal shape, an inner pad region, a middle pad region that surrounds the inner pad region, and an outer pad region that surrounds the middle pad region, some of the pads of each pad region being connected to a respective plurality of signal lines formed in the plurality of signal routing layers, and wherein some of the signal lines that are connected to pads of the outer region which are located in a corner of the polygonal shape are routed out of the footprint in a different one of the plurality of signal routing layers that is used to route the signal lines that are connected to pads of the outer region which are located between two adjacent corners of the polygonal shape.
A system comprising:
- a printed wiring board having a plurality of signal routing layers, and a plurality of pads arranged as an integrated circuit package footprint that has a rectangular shape, the footprint having an inner pad region, a middle pad region that surrounds the inner pad region, and an outer pad region that surrounds the middle pad region, some of the pads of each pad region being connected to a respective plurality of signal lines formed in the plurality of signal routing layers,
- and wherein some of the signal lines that are connected to outer pads which are located in two corners of the rectangle are routed out of the footprint in a different one of the plurality of signal routing layers that is used to route the signal lines that are connected to outer pads which are located between the two corners, so that there is sufficient space to route out of the footprint some of the signal lines that are connected to inner pads, in the same signal routing layer used to route out the signal lines that are connected to outer pads which are located between adjacent corners;
- and
- an integrated circuit package which is installed on the board to electrically connect to the plurality of pads.
1 more element
A method for laying out a circuit, comprising:
- a) defining a representation of a plurality of pads for an integrated circuit footprint having a polygonal shape, an inner pad region, a middle pad region that surrounds the inner pad region, and an outer pad region that surrounds the middle pad region and that defines a perimeter of the polygonal shape;
- b) breaking out a plurality of signals of the middle pad region on a first routing layer;
- and
- c) breaking out a plurality of signals of the outer pad region on a second routing layer, except that those that are in a corner of the polygonal shape are broken out on the first routing layer to make room for breaking out a plurality of signals of the inner pad region on the second routing layer through the corner.
1 more element
An article of manufacture comprising:
- a machine readable medium having instructions stored thereon which, when executed by a processor, cause an electronic system to display a representation of an article of manufacture in which there is an insulating layer between a plurality of signal routing layers, and a plurality of pads arranged as an integrated circuit footprint and formed in a stackup that includes the insulating layer and the plurality of signal layers, the footprint having a polygonal shape, an inner pad region, a middle pad region that surrounds the inner pad region, and an outer pad region that surrounds the middle pad region, some of the pads of each pad region being connected to a respective plurality of signal lines formed in the plurality of signal routing layers, and wherein some of the signal lines that are connected to pads of the outer region which are located in a corner of the polygonal shape are routed out of the footprint in a different one of the plurality of signal routing layers that is used to route the signal lines that are connected to pads of the outer region which are located between two adjacent corners of the polygonal shape.
Dependencies are inferred from the claim text.