Method and apparatus for object code compression and decompression for computer systems

A computer system adapted to compressing uncompressed object code instructions from an executable program for a computer, wherein the uncompressed object code instructions are compressed to reduce power consumption, the computer system including:

• a processor;
• a memory including software instructions adapted to enable the computer system to perform the steps of:
• (a) decomposing the uncompressed object code instructions into at least four predetermined instruction classes;
• (b) excluding certain uncompressed object code instructions in order to derive a mathematical model to use for compressing predetermined uncompressed object code instructions;
• (c) compressing uncompressed object code instructions from the first predetermined instruction class, wherein the uncompressed object code instructions are compressed using the derived mathematical model, and building a decoding table for the compressed object code instructions in accordance with the derived mathematical model;
• (d) compressing uncompressed object code instructions from the second predetermined instruction class, wherein an address offset is added to each object code instruction following its compression;
• (e) compressing uncompressed object code instructions from the third predetermined instruction class, wherein each uncompressed object code instruction is assigned an index value into a first decompression look-up table;
• and
• (f) patching each address offset that was added to a compressed instruction.

A computer program product for enabling a computer system to compress uncompressed object code instructions from an executable program for an embedded computer, wherein the uncompressed object code instructions are compressed to reduce power consumption, the computer program product including:

• software instructions for enabling the computer system to perform predetermined operations, and a computer readable medium bearing the software instructions;
• the predetermined operations including:
• (a) decomposing the uncompressed object code instructions into at least four predetermined instruction classes;
• (b) excluding certain uncompressed object code instructions in order to derive a mathematical model to use for compressing predetermined uncompressed object code instructions;
• (c) compressing uncompressed object code instructions from the first predetermined instruction class, wherein the uncompressed object code instructions are compressed using the derived mathematical model, and building a decoding table for the compressed object code instructions in accordance with the derived mathematical model;
• (d) compressing uncompressed object code instructions from the second predetermined instruction class, wherein an address offset is added to each object code instruction following its compression;
• (e) compressing uncompressed object code instructions from the third predetermined instruction class, wherein each uncompressed object code instruction is assigned an index value into a first decompression look-up table;
• and
• (f) patching each address offset that was added to a compressed instruction.

A computer for executing compressed object code instructions, wherein the object code instructions have been compressed to reduce power consumption, the computer including:

• a central processing device;
• a storage device;
• a memory cache device;
• a decompression engine interposed between the memory cache device and the central processing device, wherein compressed object code instructions are decompressed by the decompression engine prior to their transmittal to the central processing device;
• a first connection bus connecting the central processing device to the decompression engine;
• a second connection bus connecting the decompression engine to the memory cache device;
• and
• an address bus of a predetermined bit width interconnecting the central processing device, the storage device and the memory cache device and the decompression engine allowing communication therebetween.

A circuit for decompressing compressed object code instructions that have been compressed to reduce power consumption, the circuit comprising:

• an input buffer circuit that receives compressed object code instructions;
• a first decoding circuit having an input connected to an output of the input buffer circuit;
• a second decoding circuit having an input connected to the output of the input buffer circuit;
• a third decoding circuit having an input connected to the output of the input buffer circuit;
• an output buffer circuit having an input connected to an output from each of the first, second and third decoding circuits;
• and
• a controller circuit controlling the first decoding circuit, the second decoding circuit, the third decoding circuit and the output buffer circuit, wherein the controller circuit coordinates the decompression of compressed object code instructions.

A circuit for decompressing compressed object code instructions that have been compressed to reduce power consumption, the circuit comprising:

• an input buffer circuit for receiving and distributing compressed object code instructions transferred from a memory storage device;
• a first decoding circuit for decompressing compressed fast dictionary instructions;
• a second decoding circuit for decompressing compressed branching object code instructions;
• a third decoding circuit for decompressing non-branching object code instructions;
• an output buffer circuit for receiving and ordering the output of the first, second and third decoding circuits;
• and
• a controller circuit controlling the first decoding circuit, the second decoding circuit, the third decoding circuit and the output buffer circuit, wherein the controller circuit coordinates the decompression of compressed object code instructions.