In a memory control apparatus, which is interposed between a central processing unit and a memory device for storing data, having a cache memory for temporarily storing data of said memory device, for transferring data between said central processing unit and said memory device, a cache control method, responsive to a data write request from said central processing unit, comprising the steps of:
- judging whether said write request is a write hit, and when said write request is a write hit, storing dirty data which is updated data concerned with clean data into a region of said cache memory and storing clean data into another region of said cache memory;
- when said write request is not a write hit, reading cache using state information from means for storing cache using state information indicating using state for each region of said cache memory, and comparing said cache using state information of each of region of said cache memory;
- and
- in response to said reading and comparing step, assigning a region of said cache memory for writing said clean data and a region of said cache memory for writing said dirty data.