Method, apparatus, and system for generating serial interrupt requests (IRQ) with power savings

An apparatus comprising:

• a first component to manage serial interrupt request (IRQ) protocol for one or more I/O devices coupled to communicate data with a host processor;
• an interrupt controller to manage interrupts requests that are initiated by the one or more I/O devices via the first component and to report the interrupt requests to a host processor for corresponding services;
• and
• a first signal line used by the first component to communicate pending interrupt requests to the interrupt controller, wherein a transition of the first signal line from a first level to a second level indicating a pending interrupt request, the first signal line having a pull up resistor to pull the first signal line to the second level when the first signal line is not driven by the first component and wherein the first component generating a transition from the first level to the second level on the first signal line for a predetermined duration in response to an interrupt request initiated by the one or more I/O devices.

A system comprising:

• a first processor;
• a system memory coupled to the first processor via a system bus;
• and
• an input/output (I/O) controller coupled to the first processor via the first system bus, the I/O controller including:
• a first component to manage serial interrupt request (IRQ) protocol for one or more I/O devices;
• an interrupt controller to manage interrupts requests that are initiated by the one or more I/O devices via the first component and to report the interrupt requests to a first processor;
• and
• a first signal line used by the first component to communicate pending interrupt requests to the interrupt controller, wherein a transition of the first signal line from a first level to a second level indicating a pending interrupt request, the first signal line having a pull up resistor to pull the first signal line to the second level when the first signal line is not driven by the first component and wherein the first component generating a transition from the first level to the second level on the first signal line for a predetermined duration in response to an interrupt request initiated by the one or more I/O devices.