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US 2003/0210487 A1Published application
Digital data reproducing apparatus
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsYoshimasa Oda, Shoji Marukawa
Life of this patent
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Abstract
A digital data reproducing apparatus includes, a read head for reading data from a recording medium, an analog-to-digital converter for converting the data read by the read head into digital data, a memory for storing the digital data converted by the analog-to-digital converter, a phase control circuit for controlling phase of the digital data, and off-track detector for detecting off-track of the read head from a track on the recording medium. In the apparatus, storing operation to the memory is controlled based on output signal from the off-track detector and output signal from the phase control circuit.
Claims20
A digital data reproducing apparatus, comprising:
- a read head for reading data from a recording medium;
- an analog-to-digital converter for converting the data read by said read head into digital data;
- a memory for storing the digital data;
- a phase control circuit for controlling phase of the digital data to generate a phase flag signal which is representative of a state of phase synchronization;
- an off-track detector for detecting off-track of said read head from a record track on the recording medium to generate an off-track flag signal;
- and
- a control unit for controlling said memory in accordance with the phase flag signal and the off-track flag signal.
4 more elements
A digital data reproducing apparatus, comprising:
- a read head for reading data from a recording medium;
- an analog-to-digital converter for converting the data read by said read head into digital data;
- a memory for storing the digital data;
- an off-track detector for detecting off-track of said read head from a record track on the recording medium to generate an off-track flag signal;
- a correction circuit for generating a correction value which is used in correction processing and a phase flag signal representative of a predetermined phase synchronization status;
- a register for storing the correction value;
- an order reversing circuit for rearranging the digital data read from said memory and then corrected by said correction circuit using the correction value read from said register, in an order contrary to the order in which the digital data is read from said memory;
- and
- a control unit for controlling said memory in accordance with the off-track flag signal and the phase flag signal.
6 more elements
A digital data reproducing apparatus, comprising:
- a read head for reading data from a recording medium;
- an analog-to-digital converter for converting the data read by said read head into digital data;
- a first correction circuit for generating a correction value that is to be used to correct the digital data supplied directly from said analog-to-digital converter;
- a register for storing the correction value;
- a memory for storing the digital data supplied from said analog-to-digital converter;
- a second correction circuit for correcting the digital data stored in said memory;
- an order reversing circuit for rearranging the digital data supplied from said second correction circuit, in reverse order of time;
- and
- an off-track detector for detecting off-track of said read head from a recorded track on the recording medium,
- wherein (a) said memory stores the digital data for a period from when said off-track detector detects a transition from an off-track state to an on-track state, to when said first correction circuit comes to a predetermined stable state, thereafter, (b) the digital data stored in said memory is read in an order contrary to the order in which the digital data is stored, and then corrected by using the correction value, and (c) the order of the corrected digital data is reversed in said order reversing circuit.
7 more elements
A digital data reproducing apparatus, comprising:
- a read head for reading data from a recording medium;
- a reproduction control circuit for controlling the recording medium and said read head for reproduction of the data on a record track of the recording medium in forward and reverse directions;
- an analog-to-digital converter for converting the data read by said read head into digital data;
- an off-track detector for detecting off-track of said read head from the record track on the recording medium;
- a correction circuit for correcting the digital data, and for generating a correction value;
- a register for storing the correction value;
- and
- an order reversing circuit for rearranging the digital data supplied from said correction circuit in reverse order of time;
- wherein, (a) in the forward reproduction of the data on the record track, when said correction circuit comes to a predetermined stable state after said off-track detector detects a transition from an off-track state to an on-track state, the correction value under the stable state of said correction circuit is stored into said register;
- (b) after said forward reproduction is completed, said reproduction control circuit provides the reverse reproduction of the data on the record track, with the correction value stored in said register used as an initial value of said correction;
- and (c) said order reversing circuit reverses the order of the data obtained in said reverse reproduction.
8 more elements
A digital data reproducing apparatus that reads digital data from a recording medium by using a read head, comprising:
- an off-track detector for detecting off-track of said read head from a record track on the recording medium, and generating an off-track flag signal;
- a correction circuit for generating a correction value which is to be used for correction of the digital data;
- and
- an order reversing circuit for reversing order of the digital data corrected by said correction circuit, said order reversing circuit including,
- a memory used in reversing order of the digital data supplied from said correction circuit, and
- a synchronization pattern detector for detecting a synchronization pattern from the digital data, and generating a synchronization flag signal;
- and
- a control unit for controlling said memory in accordance with said off-track flag signal and said synchronization flag signal.
5 more elements
Dependencies are inferred from the claim text.