Thin film transistor array panel
AssigneeSamsung Electronics Co., Ltd.
InventorsJoo-Hyung Lee, Dong-Gyu Kim, Woon-Yong Park
Life of this patent
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Abstract
A data line and an amorphous silicon pattern are formed on a substrate. The first electrode pattern is extended from the data line and overlaps an edge of the amorphous silicon pattern. The second electrode pattern is made of the same metal as the first electrode pattern and overlaps the edge of the amorphous silicon pattern at an opposite side of the first electrode pattern. Edges of the first and the second electrode patterns are sharply formed so that a tunneling effect easily occurs through the amorphous silicon pattern. An indium-tin-oxide pattern for a capacitor is formed at the end of the second electrode pattern. The capacitor is formed between the ITO pattern and a common electrode.
Claims50
A liquid crystal display substrate comprising:
- a first insulating substrate;
- a plurality of pixel electrodes for displaying images provided on the first substrate;
- a plurality of switching elements connected to the pixel electrodes;
- a plurality of wires formed on the first substrate and connected to the switching elements;
- and
- a plurality of spark inducing circuits which are connected between the wires adjacent to each other and extinguish electrostatic charges generated on the first substrate by generating sparks responsive to the generated electrostatic charges.
A liquid crystal display substrate comprising:
- a first insulating substrate;
- a plurality of pixel electrodes for displaying images provided on the first substrate;
- a plurality of switching elements connected to the pixel electrodes;
- a plurality of wires which are formed on the first substrate and connected to the switching elements;
- and
- an electrostatic charging circuit connected between the wires adjacent to each other and storing and extinguishing electrostatic charges generated in the wires.
A liquid crystal display substrate comprising:
- a plurality of gate lines which are formed on a substrate;
- a gate insulating film covering the gate lines;
- a plurality of data lines which are formed on the gate insulating film and vertically intersect the gate lines;
- at least a dummy gate line and a data dummy line which respectively link all the gate lines and all the data lines, the dummy gate line covered with the gate insulating film;
- a thin film transistor having a gate electrode which is connected to the dummy gate line, a source electrode which Is connected to either the data line or the dummy data line, and a drain electrode;
- and
- a capacitor electrode which is connected to the drain electrode and overlaps the dummy gate line.
A manufacturing method of a liquid crystal display substrate comprising the steps of:
- forming a plurality of liquid crystal display panel regions having thin film 110 transistors, pixel electrodes, wires and electrostatic charge dispersing circuits on a first insulating substrate;
- forming shorting bars which link the wires in each of the panel regions,
- forming a cutting line for dividing the liquid crystal display panel regions on the first substrate such that the shorting bar Is located inside the cutting line;
- aligning a second substrate with the first substrate;
- sealing the first and the second substrates;
- cutting the first substrate along the cutting line to divide into a plurality of liquid crystal display panels;
- injecting a liquid crystal material into the liquid crystal display panel through an injection hole;
- sealing the injection hole;
- removing the shorting bars;
- detecting defects in the liquid crystal display panel;
- and
- attaching polarizers on the liquid crystal display panel.
A liquid crystal display comprising:
- a first insulating substrate;
- a plurality of gate lines which are formed on the first substrate;
- a plurality of data lines which intersect the gate lines to define a plurality of pixel regions;
- a plurality of pixel electrodes which are formed in the pixel regions;
- a plurality of first thin film transistors formed in the pixel regions, each thin film transistor includes a gate, a source and a drain electrodes respectively to connected to one of the gate lines, one of the data lines and one of the pixel electrodes;
- a plurality of dummy data lines which are formed outside an active area including the pixel regions, and intersect the gate lines to define a plurality of first dummy pixel regions;
- a plurality of dummy gate lines which are formed outside the active area and intersect the data lines or the dummy data lines to define a plurality of second dummy pixel regions;
- a dummy pixel electrode which is formed in the first or the second dummy pixel region;
- a dummy thin film transistor which is connected to the gate line, the data line, the dummy gate line and either the dummy data line in the dummy pixel region, and has a ratio of a channel width to a channel length is larger than the first thin film transistors;
- and
- a second substrate which opposes the first substrate.
A liquid crystal display comprising:
- a first insulating substrate;
- a plurality of gate lines which are formed on the first substrate:
- a plurality of data lines which intersect the gate lines to define a plurality of pixel regions;
- a plurality of pixel electrodes which are formed in the pixel regions;
- a plurality of first thin film transistors formed in the pixel regions, each thin film transistor includes a gate, a source and a drain electrodes respectively connected to one of the gate lines, one of the data lines and one of the pixel electrodes;
- a plurality of dummy data lines which are formed outside an active area including the pixel regions, and intersect the gate lines to define a plurality of first dummy pixel regions;
- a plurality of dummy gate lines which are formed outside the active area and intersect the data lines or the dummy data lines to define a plurality of second dummy pixel regions;
- a dummy pixel electrode which is formed in the first or the second dummy pixel region;
- and
- a plurality of dummy thin film transistors which are formed in one of the first or the second dummy pixel regions and are connected to the gate line, the data line, and either the dummy gate line or the dummy data line.
A liquid crystal display comprising:
- a insulating substrate;
- a plurality of wires which are formed on the substrate;
- and
- a first discharging pattern which is connected to one of the wires and has a semiconductor pattern, wherein electrostatic charges are discharged through the channel generated in the semiconductor pattern by tunneling effect.
A liquid crystal display comprising:
- an insulating substrate;
- an insulating film which is formed on the substrate;
- a wire which is formed on the substrate in a first direction;
- an amorphous silicon pattern for discharging electrostatic charges which is formed near the wire;
- a first electrode which extends from the wire and contacts an edge of the amorphous silicon pattern;
- and
- a second electrode which contacts another edge of the amorphous silicon pattern, wherein electrostatic charges are discharged from the first electrode to the second electrode through the amorphous silicon pattern by tunneling effect.
A manufacturing method of a liquid crystal display comprising of the steps:
- depositing a first metal layer on an insulating substrate;
- patterning the first metal layer to form gate wires;
- forming a gate insulating film, an amorphous silicon layer, a doped amorphous silicon layer and a amorphous silicon pattern for discharging electrostatic charges;
- depositing a second metal layer;
- and
- patterning the second metal layer to form data wires, and first and second electrodes for discharging electrostatic charges connected to the amorphous silicon pattern.
A liquid crystal display having a plurality of pixels comprising:
- a plurality of gate lines and a plurality of data lines which intersect each other to define the pixels;
- at least one dummy gate line which are formed in parallel with the gate line and located outside an active area which includes the pixels;
- a first resistor and a capacitor which are connected in series between a first data line of the data lines and the dummy gate line;
- and
- a second resistor which is connected to the capacitor and to a data line adjacent to the first data line.
A liquid crystal display comprising:
- a plurality of gate lines formed on a substrate;
- at least one dummy gate line formed on the substrate outer of the gate lines;
- a gate insulating film covering the gate lines and the dummy gate line;
- a plurality of data lines which are formed on the gate insulating film and intersect the gate lines and the dummy gate lines;
- a plurality of first semiconductor patterns which are formed on the gate insulating film and respectively connected to a first data line of the data lines;
- a plurality of second semiconductor patterns which are formed on the gate insulating film and respectively connected to a second data line of the data lines adjacent to the first data line;
- a passivation film covering the data lines and the first and the second semiconductor patterns;
- and
- at least one capacitor patterns which are formed on the passivation film, overlap the dummy gate lines and, and are electrically connected to the first and the second semiconductor patterns.
Dependencies are inferred from the claim text.