Integrated low power channel select filter having high dynamic range and bandwidth

A filter circuit comprising:

• at least one transconductor-capacitor (gm-C) filter having an adjustable capacitance and a programmable gain;
• a replica transconductor-capacitor (gm-C) filter having an adjustable capacitance similar to the at least one transconductor-capacitor (gm-C) filter;
• a transresistance amplifier, having an adjustable resistance, connected to an output of the at least one transconductor-capacitor (gm-C) filter;
• a clock device coupled to an input of the replica transconductor-capacitor (gm-C) filter;
• and
• a phase detector coupled to an output of the replica transconductor-capacitor (gm-C) filter and configured to detect a phase shift in a signal output by the replica transconductor-capacitor (gm-C) filter;
• wherein an amount of phase shift detected by the phase detector is utilized to adjust the capacitance in the at least one transconductor-capacitor (gm-C) filter and the replica transconductor-capacitor (gm-C) filter, in order to tune a cut-off frequency of the filter circuit;
• and
• wherein a gain is set by adjusting the programmable gain in the at least one transconductor-capacitor (gm-C) filter and the adjustable resistance in the transresistance amplifier.

A radio receiver having an integrated channel select filter, the channel select filter comprising:

• a low Q biquad filter having a digitally tuned capacitor array;
• a high Q biquad filter having a digitally tuned capacitor array, coupled to an output of the low Q biquad filter;
• a replica biquad filter having a digitally tuned capacitor array, the replica biquad filter comprising a scaled version of the high Q biquad filter;
• a transresistance amplifier having a digitally tuned feedback resistor, connected to an output of the high Q biquad filter;
• a clock device coupled to an input of the replica biquad filter;
• a phase detector coupled to an output of the replica biquad filter and configured to detect a phase shift in a signal output by the replica biquad filter;
• and
• a state machine coupled to an output of the phase detector and configured to output a digital signal to adjust the capacitor arrays in the low Q biquad filter, the high Q biquad filter, and the replica biquad filter, in order to tune a cut-off frequency of the channel select filter.

A method of filtering an input signal, the method comprising:

• filtering the input signal with at least one transconductor-capacitor (gm-C) filter, wherein the at least one transconductor-capacitor (gm-C) filter is adjusted to automatically tune a cut-off frequency, the method of adjusting comprising:
• inputting a clock signal into a replica transconductor-capacitor (gm-C) filter;
• detecting a phase shift in an output signal of the replica transconductor-capacitor (gm-C) filter;
• and
• adjusting a capacitance in the at least one transconductor-capacitor (gm-C) and the replica transconductor-capacitor (gm-C) filter, based upon the detected phase shift.

A method of filtering an input signal, the method comprising:

• filtering the input signal with a low Q biquad filter;
• filtering an output of the low Q biquad with a high Q biquad filter;
• and
• amplifying an output of the high Q biquad filter with a transresistance amplifier;
• wherein the biquad filters are adjusted to automatically tune a cut-off frequency, the method of adjusting comprising:
• inputting a clock signal into a replica biquad filter;
• detecting a phase shift in an output signal of the replica biquad filter;
• and
• adjusting a capacitance in the low Q biquad filter, the high Q biquad filter and the replica biquad filter, based upon the detected phase shift.