Image processing apparatus
AssigneeCanon Kabushiki Kaisha
InventorKazuhiro Imaizumi
Life of this patent
Estimating the term…
Abstract
An image processing apparatus which eliminates noise which occurs due to the influence of output from a parallel bus drive circuit added to an output final stage circuit of signal processor or the like. A delay circuit 110 which delays a video signal is inserted into a VTR signal processor such that a data transition point of particular bit in a bit array indicating horizontal-directional start and end positions of video signal data, added during a horizontal retrace period of a digital recording format video signal, does not overlap with a period for sampling a feedthrough period and a photoelectric conversion signal period in a correlated double sampling circuit.
Claims13
An image processing apparatus comprising:
- a solid image sensing device that outputs an image sensing signal where a signal including a reset period, a feedthrough period at a reference level and a photoelectric conversion signal period is repeated at predetermined periods;
- a correlated double sampling circuit that processes the image sensing signal;
- a video signal processing circuit that further processes and converts a video signal outputted from said correlated double sampling circuit into a predetermined digital format video signal, and outputs the video signal;
- and
- an adjustment circuit that performs adjustment such that timing of data transition of a particular bit in a bit array indicating a horizontal retrace period of said digital format video signal does not overlap with a period for sampling the feedthrough period and the photoelectric conversion signal period in said correlated double sampling circuit.
An image processing apparatus comprising:
- a sampling circuit that samples an analog signal from an image sensing unit;
- an analog-digital converter that converts said analog signal outputted from said sampling circuit into a digital signal;
- a parallel output circuit that outputs a plural-bit digital signal outputted from said parallel output circuit in parallel;
- and
- an adjustment circuit that performs adjustment such that transition timing in a case where the amount of transition of the plural bit signal outputted from said parallel output circuit is greater than a predetermined value does not overlap with timing of sampling the analog signal from said image sensing device in said sampling circuit,
- wherein said sampling circuit, said analog-digital conversion circuit, said parallel output circuit and said adjustment circuit are formed on the same semiconductor chip.
Dependencies are inferred from the claim text.