Queue mechanism
AssigneeAdvanced Micro Devices, Inc.
InventorsSiegfried Kay Hesse, Dale E. Gulick
Life of this patent
Estimating the term…
Abstract
A data storage mechanism is provided where a plurality of data items are stored in a plurality of register elements. Each registered element is capable of storing at least one data item. The plurality of register elements is arranged to form a sequence of register elements. First data is stored in a first part of the sequence and second data is stored in a second part of the sequence. The first part and the second part are of variable lengths with the sum of the variable lengths being equal to the lengths of the sequence of register elements. Thus, a double-ended queue mechanism is provided which may be used to store data of different type or data which is either scheduled periodically or asynchronously. The mechanism may be used in a USB 2.0 compliant host controller.
Claims50
An apparatus comprising:
- a data storage unit configured to store a plurality of data items, said data storage unit including a plurality of register elements, each register element being capable of storing at least one data item, said plurality of register elements being arranged to form a sequence of register elements;
- and
- a controller configured to control said data storage unit to store first data in a first part of said sequence of register elements and second data in a second part of said sequence of register elements, said first part and said second part being of variable lengths with the sum of the variable lengths being equal to the length of said sequence of register elements.
A southbridge integrated circuit chip comprising:
- data storage circuitry configured to store a plurality of data items, said data storage circuitry including a plurality of register elements, each register element being capable of storing at least one data item, said plurality of register elements being arranged to form a sequence of register elements;
- and
- control circuitry configured to control said data storage circuitry to store first data in a first part of said sequence of register elements and second data in a second part of said sequence of register elements, said first part and said second part being of variable lengths with the sum of the variable lengths being equal to the length of said sequence of register elements.
A method of operating a data storage unit to store a plurality of data items, said data storage unit including a plurality of register elements, each register element being capable of storing at least one data item, said plurality of register elements being arranged to form a sequence of register elements, the method comprising:
- controlling said data storage unit to store first data in a first part of said sequence of register elements;
- and
- controlling said data storage unit to store second data in a second part of said sequence of register elements;
- wherein said first part and said second part are of variable lengths and the sum of the variable lengths is equal to the length of said sequence of register elements.
Dependencies are inferred from the claim text.