US 2003/0202000 A1Published application

Display device and driving circuit for displaying

AssigneeRenesas Technology Corp.

InventorsYasuyuki Kudo, Akihito Akai, Kazuo Okado, Toshimitsu Matsudo, Atsuhiro Higa

Life of this patent

Estimating the term…

Loading patent…

Abstract

A frame memory 105 stores the original image data received from a higher-level device 102 via an interface 103. Color reduction processing means receives color reduction rate data through a transfer from an upper-level device 102 or manual setting means such as a switch or jumper settings. Based on this color reduction rate data, the number of colors in the gradation data of the original image is reduced, and the color count of the original image is simulated using the reduced color count. Also included are a timing generating circuit 106 and a gradation voltage generating circuit 107. A gradation voltage selector 108 performs a partial halting of driver operations based on the color reduction rate.

Claims10

Dependent claims

A display device comprising:

a pixel circuit in which a plurality of intersecting data lines and scan lines are formed, pixels being formed near said intersections;
a data line driver including a gradation voltage generating circuit formed from a plurality of voltage level generating circuits, using gradation data representing color concentration of an original image received from a higher-level device to select a gradation voltage generated by said plurality of voltage level generating circuits, and using an internally generated display sync signal to output said selected gradation voltages a line at a time to said data lines;
a scan line driver using said display sync signal to output scan voltages to said scan lines for sequential selection of said scan lines;
and
a power supply circuit generating said gradation voltages, said scan voltages, and reference potentials needed to drive said display device,
wherein said data line driver reduces color count information size in said gradation data received from said higher-level device based on said color reduction rate data and halts a portion of said plurality of voltage level generating circuits drivers based on said color reduction rate data.

3 more elements

A display driver comprising:

a memory storing gradation levels representing color concentrations of an original image provided by a higher-level device;
a timing generating circuit internally generating a display sync signal based on control data provided by said higher-level device;
a gradation voltage generating circuit generating a said gradation voltages having a plurality of levels;
a gradation voltage selector selecting one level out of said plurality of gradation voltages generated by a plurality of voltage level generating circuits of said gradation voltage generating circuit based on gradation data read from said frame memory, and outputting said selected gradation voltages one line at a time;
and
a color reduction processing circuit reducing color count information size of said gradation data based on said color reduction rate data;
wherein said gradation voltage generating circuit halts output of said gradation voltage levels made unnecessary for displaying as a result of said reduction of said color count information size in said gradation data.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/372,437Filed 25 Feb 2003
Priority: JP 2002-12639926 Apr 2002
Published: 30 Oct 2003
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G09G 3/2051
Using dithering: with use of a spatial dither pattern
G09G 3/2092
For presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged…:…
G09G 3/2018
Display of intermediate tones: by time modulation using two or more time intervals
G09G 3/3648
Control of matrices with row and column drivers: using an active matrix