Low quiescent power class AB current mirror circuit

A low quiescent power class AB current mirror circuit comprising:

• a first input transistor for receiving an input current and having a base;
• a second output transistor for providing an output current and having a base, said first input and second output transistors having their bases connected together;
• a sixth and fifth transistor and a first current source, the sixth transistor is a PNP transistor type and the fifth transistor is an NPN transistor type, each of said sixth and fifth transistors having a base, an emitter and a collector, and where:
• the base of the sixth transistor is connected to its collector, the emitter of the sixth transistor is connected to the emitter of the fifth transistor and the collector of the sixth transistor is connected to a base of a third transistor;
• the base of the fifth transistor is connected to the input current, the collector of the fifth transistor is connected to the first power supply bus and the emitter of the fifth transistor is connected to the emitter of the sixth transistor;
• the first current source supplies input current to the circuit and connects to the base of the fifth transistor and to the collector of the first input transistor;
• a fourth and the third transistor, the fourth transistor is an NPN transistor type and the third transistor is a PNP transistor type, each of said fourth and third transistors having a base, an emitter and a collector, and where:
• the base of the fourth transistor is connected to the input current, the collector of the fourth transistor is connected to a first power supply bus and the emitter of the fourth transistor is connected to the bases of the first input transistor and the second output transistor, and where
• the base of the third transistor is connected to the collector of the sixth transistor, the collector of the third transistor is connected to the negative power supply bus and the emitter of the third transistor is connected to the bases of the first input transistor and the second output transistor.

A low quiescent power class AB current mirror circuit comprising:

• a first transistor having a base;
• a second transistor having a base, said first and second transistors having their bases connected together;
• a sixth and fifth transistor and a second current source, the sixth transistor is an NPN transistor type and the fifth transistor is a PNP transistor type, each of said sixth and fifth transistors having a base, an emitter and a collector, and where:
• the base of the sixth transistor is connected to its collector, the emitter of the sixth transistor is connected to the emitter of the fifth transistor and the collector of the sixth transistor is connected to a base of a third transistor;
• the base of the fifth transistor is connected to the input current, the collector of the fifth transistor is connected to the negative power supply bus and the emitter of the fifth transistor is connected to the emitter of the sixth transistor;
• the second current source supplies bias current to the circuit and connects to the base of the third transistor and to the collector of the sixth transistor;
• a fourth and the third transistor, the fourth transistor is a PNP transistor type and the third transistor is an NPN transistor type, each of said fourth and third transistors having a base, an emitter and a collector, and where:
• the base of the fourth transistor is connected to the input current, the collector of the fourth transistor is connected to the negative power supply bus and the emitter of the fourth transistor is connected to the bases of the first transistor and the second transistor, and where
• the base of the third transistor is connected to the collector of the sixth transistor, the collector of the third transistor is connected to the first power supply bus and the emitter of the third transistor is connected to the bases of the first transistor and the second transistor.

A low quiescent power class AB current mirror circuit comprising:

• a first transistor having a base;
• a second transistor having a base, said first and second transistors having their bases connected together;
• a sixth and fifth transistor and a second current source, the sixth transistor is a PNP transistor type and the fifth transistor is an NPN transistor type, each of said sixth and fifth transistors having a base, an emitter and a collector, and where:
• the base of the sixth transistor is connected to the collector of the first transistor, the emitter of the sixth transistor is connected to the base of a third transistor and the collector of the sixth transistor is connected to a negative power supply bus;
• the base of the fifth transistor is connected to the collector of the first transistor, the collector of the fifth transistor is connected to a first power supply bus and the emitter of the fifth transistor is connected to the base of a fourth transistor;
• a second current source supplies bias current to the circuit and connects to the base of the third transistor and to the emitter of the sixth transistor;
• a fourth and the third transistor, the fourth transistor is a PNP transistor type and the third transistor is an NPN transistor type, each of said fourth and third transistors having a base, an emitter and a collector, and where:
• the base of the fourth transistor is connected to the emitter of the fifth transistor, the collector of the fourth transistor is connected to the negative power supply bus and the emitter of the fourth transistor is connected to the bases of the first transistor and the second transistor, and where
• the base of the third transistor is connected to the emitter of the sixth transistor, the collector of the third transistor is connected to the first power supply bus and the emitter of the third transistor is connected to the bases of the first transistor and the second transistor.