Analog switch circuit
AssigneesHitachi, Ltd., Hitachi Hokkai Semiconductor, Ltd.
InventorYasuyuki Saito
Life of this patent
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Abstract
An analog switch and an analog multiplexer are realized by which electron charges which have been stored in a stray capacitance provided on the output side thereof before a switch is conducted do not give an adverse influence to a level of such an analog input voltage which is subsequently entered after the switch has been switched. An analog switch circuit is arranged by insulating gate type transistors and a voltage follower which is parallel-connected to these insulating type transistors. When the analog switch circuit is turned ON, the voltage follower is firstly brought into an active state, and thereafter, these insulating gate type transistors are brought into conductive conditions.
Claims14
1 A semiconductor integrated circuit device, comprising a plurality of analog input nodes, one of which is receiving an analog in a predetermined sampling period;
- an analog output node;
- a plurality of analog switch circuits, each of which is being provided between each of the plurality of analog input nodes and the analog output node;
- wherein each of the plurality of analog switch circuits includes a transfer gate and an amplifier connected in parallel;
- and
- wherein input impedance of the amplifier is larger than impedance of the transfer gate.
The semiconductor integrated circuit device according to claim 1,
- wherein said amplifier is a differential amplifying circuit having an amplifier input node, an amplifier inverting input node, and an amplifier output node;
- and
- wherein said amplifier input node is connected to a corresponding analog input node, said amplifier output node is connected to the analog output node and said amplifier inverting input node, respectively.
The semiconductor integrated circuit device according to claim 1,
- wherein said predetermined sampling period includes a first period in which the transfer gate is in a conductive state and a second period in which the amplifier is in an active state;
- and
- wherein the second period precedes the fist period.
The semiconductor integrated circuit device according to claim 1,
- wherein said transfer gate includes a p-channel MOSFET and an n-channel MOSFET connected in parallel such that complimentary control signals are inputted to gates of the p-channel MOSFET and the n channel MOSFET in parallel.
The semiconductor integrated circuit device according to claim 1,
- wherein said transfer gate includes a first and a second p-channel MOSFET connected serially, and the first and second n-channel MOSFETs connected serially and the two p-channel MOSFETs and two n-channel MOSFETs are connected in parallel, and complimentary control signals are inputted to gates of the first and second p-channel MOSFETs and the first and second n-channel MOSFETs.
The semiconductor integrated circuit device according to claim 1, further comprising:
- a sample-and-hold circuit connected to the analog output node;
- and
- an A/D converter connected to the sample-and-hold circuit.
A method of inputting an analog signal to a semiconductor integrated circuit device comprising:
- providing the semiconductor integrated circuit having a plurality of analog input nodes, an output node, a transfer gate and an amplifier connected in parallel being respectively placed between each of the analog input node and the output node, input impedance of the amplifier being larger than impedance of the transfer gate;
- selecting one of the plurality of analog input nodes;
- activating the amplifier connected to the selected analog input node;
- and
- conducting the transfer gate connected to the selected analog input node after activating the amplifier.
Dependencies are inferred from the claim text.