Post-silicon control of phase locked loop charge pump current
AssigneeSun Microsystems, Inc.
InventorsClaude Gauthier, Brian Amick, Pradeep Trivedi, Dean Liu
Life of this patent
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Abstract
A post-silicon technique for adjusting a current of a charge pump in a phase locked loop is provided. The technique involves use of an adjustment circuit operatively connected to the charge pump, where the adjustment circuit is controllable to facilitate an internal biasing of the charge pump. Such control of the charge pump current in a phase locked loop allows a designer to achieve desired PLL performance characteristics after the PLL has been fabricated.
Claims19
An integrated circuit, comprising:
- a phase locked loop comprising:
- a phase frequency detector that detects a phase difference between a system clock signal and a feedback clock signal,
- a charge pump, responsive to the phase frequency detector, that outputs a current on a control signal,
- a bias generator, responsive to the control signal, that generates a bias voltage, and
- a voltage controlled oscillator, responsive to the bias voltage, that generates an output clock signal;
- and
- an adjustment circuit operatively connected to the charge pump, wherein
- the adjustment circuit is controllable to adjust the current output from the charge pump.
A phase locked loop, comprising:
- a phase frequency detector that detects a phase difference between a system clock signal and a feedback clock signal;
- a charge pump, responsive to the phase frequency detector and an adjustment circuit operatively connected to the charge pump, that generates a current signal, wherein the adjustment circuit is controllable to adjust the current signal;
- a bias generator, responsive to the current signal, that generates a bias voltage;
- and
- a voltage controlled oscillator, responsive to the bias voltage, that generates an output clock signal.
A method for post-silicon adjustment of a phase locked loop, comprising:
- comparing an input clock signal and a feedback clock signal;
- generating a current signal using a charge pump responsive to the comparing;
- selectively adjusting the current signal using an adjustment circuit operatively connected to the charge pump;
- and
- generating a bias voltage to a voltage controlled oscillator dependent on the selectively adjusting, wherein the voltage controlled oscillator generates an output clock signal.
An integrated circuit, comprising:
- phase locked loop means for generating an output clock signal, wherein the phase locked loop means comprises:
- comparing means for detecting a phase difference between an input clock signal and a feedback clock signal, wherein the feedback clock signal is based on the output clock signal,
- charge pumping means for generating a current on a control signal, wherein the charge pumping means is responsive to the comparing means,
- bias generating means for generating a bias voltage, wherein the bias generating means is responsive to the control signal, and
- oscillating means for generating the output clock signal, wherein the oscillator means is responsive to the bias voltage;
- and
- adjusting means for adjusting the current output from the charge pump, wherein the charge pump means is responsive to the adjustment means.
Dependencies are inferred from the claim text.