Semiconductor device having one of patterned SOI and SON structure

A semiconductor device comprising:

• a first semiconductor layer provided on and electrically connected to a semiconductor substrate;
• a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity;
• and
• a first element region provided in one of the first and second semiconductor layers and located at a first distance from a boundary between the first and second semiconductor layers;
• a second element region provided in said one of the first and second semiconductor layers where the first element region is provided, and located at a second distance longer than the first distance from the boundary between the first and second semiconductor layers;
• a first MOS transistor provided in the first element region and having a gate electrode arranged parallel to the boundary between the first and second semiconductor layers;
• and
• a second MOS transistor provided in the second element region and having a gate electrode arranged perpendicular to the gate electrode of the first MOS transistor.

A semiconductor device comprising:

• a first semiconductor layer provided on and electrically connected to a semiconductor substrate;
• a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity;
• and
• a third semiconductor layer provided in the first semiconductor layer, part of the third semiconductor layer being extended to reach the semiconductor substrate just under the second semiconductor layer.

A semiconductor device comprising:

• a first semiconductor layer provided on and electrically connected to a semiconductor substrate;
• a second semiconductor layer provided near the first semiconductor layer and formed above the semiconductor substrate via one of an insulating film and a cavity;
• and
• a group of semiconductor elements provided in one of the first and second semiconductor layers, except for a region near a boundary between the first and second semiconductor layer;
• and
• a group of dummy elements for the semiconductor elements provided on the first and second semiconductor layers near the boundary.