Shallow trench isolation type semiconductor device and method of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorYou-Cheol Shin
Life of this patent
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Abstract
A shallow trench isolation type semiconductor device is described, which includes a trench having a flexure in a bottom thereof. The flexure has a step difference of about 100 Å or more, and is preferably made at a middle area. Conventionally, a gate insulating layer includes a thin area of about 100 Å or less and a thick area of about 200 Å or more. On the basis of a bottom of a trench peripheral region, a middle part of the flexure may be concave or convex. Particularly, the foregoing device can effectively be applied to a self-aligned flash memory in which a width of a trench between one active region and another is about 3 micrometers or less.
Claims15
A shallow trench isolation type semiconductor device including:
- at least two regions where gate insulating layers differ in thickness;
- and
- a silicon substrate with at least one flexure trench having a step difference.
A shallow trench isolation type flash memory device including a flexure trench with a flexure having a step difference of about 100 Å to about 500 Å in a bottom thereof.
A method of forming a shallow trench isolation type semiconductor device comprising the steps of:
- forming a gate oxide layer, so that a flexure is different from adjacent parts in thickness, the flexure being a part of a trench area on a substrate;
- forming an etching mask pattern to expose the gate oxide layer in the trench area;
- and
- anisotropically and sequentially etching the gate oxide layer and a silicon substrate to form a trench, the gate oxide layer being located on the substrate where the etching mask pattern is formed.
Dependencies are inferred from the claim text.