High voltage mos-gated power device and related manufacturing process
AssigneeSTMicroelectronics S.r.I.
InventorFerruccio Frisina
Life of this patent
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Abstract
MOS-gated power device including a plurality of elementary functional units, each elementary functional unit including a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type. A plurality of doped regions of a first conductivity type is formed in the semiconductor material layer, each one of the doped regions being disposed under a respective body region and being separated from other doped regions by portions of the semiconductor material layer.
Claims26
MOS-gated power device comprising a plurality of elementary functional units, each elementary functional unit comprising a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type, a plurality of doped regions of a first conductivity type formed in said semiconductor material layer, each one of said doped regions being disposed under a respective body region and being separated from other doped regions by portions of said semiconductor material layer.
Process for the manufacturing of a MOS-gated power device, comprising the steps of:
- a) forming a semiconductor material layer of a first conductivity type and with a first resistivity value over a heavily doped semiconductor substrate of the first conductivity type;
- b) forming an insulated gate layer over said semiconductor material layer;
- c) selectively removing said insulated gate layer to open windows over selected portions of a surface of said semiconductor material layer;
- d) forming body regions of a second conductivity type and with a second resistivity value in said semiconductor material layer using the remaining portions of said insulated gate layer as a mask;
- e) forming source regions of the first conductivity type in said body regions,
- said process providing for forming doped regions of the second conductivity type in said semiconductor material layer, each one of said doped regions being located under a respective body region of the final power device and extending in said semiconductor material layer, wherein said doped regions of the second conductivity type under said body regions are formed implanting into said semiconductor material layer of the first conductivity type a dopant of the second conductivity type in a dose suitable to invert the first conductivity type of said semiconductor material layer.
Dependencies are inferred from the claim text.