Strained fin fets structure and method

An asymmetric strained Fin field effect transistor comprising:

• an insulator;
• a semiconductor structure on said insulator, wherein said structure includes a central portion and Fins extending from ends of said central portion;
• a first gate positioned on a first side of said central portion of said structure;
• a strain-inducing layer between said first gate and said first side of said central portion of said silicon structure;
• and
• a second gate on a second side of said central portion of said silicon structure,
• wherein said first gate and said second gate are doped differently.

A symmetric strained Fin field effect transistor comprising:

• an insulator;
• a semiconductor structure on said insulator, wherein said structure comprises a Fin body having a central portion comprising silicon and silicon germanium;
• and end portions comprising silicon;
• a first gate positioned on a first side of said central portion of said silicon structure;
• and
• a second gate on a second side of said central portion of said structure,
• wherein said first gate and said second gate are doped similarly.

A method of forming a transistor comprising:

• forming a silicon layer on an insulator;
• etching a first portion of said silicon layer to create a first opening;
• depositing a first gate in said first opening;
• etching a second portion of said silicon layer to create a second opening opposite said first opening, wherein after said etching of said second portion, said silicon layer comprises a silicon structure on said insulator having a central portion and Fins extending from ends of said central portion;
• forming a strain-producing layer upon a portion of opening;
• forming a second gate in said second opening;
• and
• removing said first gate and said second gate from all portions of said silicon structure except said central portion.

A method of forming an asymmetric strained Fin field effect transistor comprising:

• forming a silicon layer on an insulator;
• etching a first portion of said silicon layer to create a first opening;
• depositing a first gate in said first opening;
• etching a second portion of said silicon layer to create a second opening opposite said first opening, wherein after said etching of said second portion, said silicon layer comprises a silicon structure on said insulator having a central portion and Fins extending from ends of said central portion;
• forming a silicon germanium layer upon a portion of said silicon structure facing said second opening;
• forming a second gate in said second opening, wherein said first gate and said second gate are doped differently;
• and
• removing said first gate and said second gate from all portions of said silicon structure except said central portion.

A method of forming strained Fin field effect transistor comprising:

• forming a silicon structure on an insulator;
• forming stress on one side of said silicon structure, having a central portion and Fins extending from ends of said central portion;
• depositing a first gate and a second gate on sides of said silicon structure;
• and
• removing said first gate and said second gate from all portions of said silicon structure except said central portion.

A method of forming a transistor comprising:

• forming a silicon germanium layer on an insulator;
• etching said silicon germanium layer to create a central portion and Fins Lending from ends of said central portion;
• growing a strained silicon layer on said silicon germanium layer;
• growing a thermal oxide on said strained silicon layer;
• and
• growing gate conductors on said thermal oxide.