Function unit based finite state automata data structure, transitions and methods for making the same
AssigneeIntel Corporation
InventorsChen Fu, Dong-Yuan Chen, Chengyong Wu, Dz-Ching Ju
Life of this patent
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Abstract
We disclose a function unit based finite state automata data structure for use in computer program compilers. According to an aspect of an embodiment, the data structure comprises a function unit vector, having no more used bits than there are issue ports for any particular microprocessor, and a plurality of valid template assignments for each function unit vector. In a preferred embodiment, the template assignments are constructed so as to account for dispersal rules associated with the particular microprocessor. Further, the template assignments can be sorted according to priority data.
Claims22
A computer implemented method for constructing a function unit based finite state automata data structure comprising:
- receiving a template assignment;
- creating a first vector corresponding to the template assignment, the first vector accounting for dispersal rules;
- determining whether a second vector, corresponding to the first vector, exists in the data structure;
- and
- adding the template assignment to the data structure in a location corresponding to the second vector.
A computer readable medium having stored therein one or more sequences of instructions for causing a microprocessor to construct a function unit based finite state automata data structure, the instructions configured to cause the acts of:
- receiving a template assignment;
- creating a first vector corresponding to the template assignment, the first vector accounting for the dispersal rules;
- determining whether a second vector, corresponding to the first vector, exists in the data structure;
- and
- adding the template assignment to the data structure in a location corresponding to the second vector.
A computer memory structure configured to be accessible by a compiler, the structure comprising:
- a plurality of function unit vectors, each function unit vector constructed with a sequence of bits, each bit corresponding to an issue port of a microprocessor;
- and
- a plurality of function unit template assignments, each template assignment corresponding to at least one of the function unit vectors, and each template assignment configured to identify a valid function unit usage arrangement of the function units in the microprocessor arranged according to dispersal rules.
Dependencies are inferred from the claim text.