Digital circuits using universal logic gates

A digital circuit design embodied in physical and/or schematic form, the digital circuit design comprising:

• a plurality of first sub-circuits comprising a first percentage of the digital circuit design;
• and
• a plurality of second sub-circuits comprising a second percentage of the digital circuit design, wherein:
• each of second sub-circuits is substantially comprised of one or more kernel circuits,
• each the kernel circuits are chosen from a group consisting of a selection circuit type, a memory circuit type, and a buffer circuit type, and
• the second percentage is at least 5%.

A digital circuit design describing a plurality of cells, wherein the digital circuit design is embodied in a computer signal, the digital circuit design comprising:

• a first code segment comprising a first description of a first basic cell and a first interconnection of the first basic cell;
• a second code segment comprising a second description of a second basic cell and a second interconnection of the second basic cell, wherein:
• the first description indicates which of a selection circuit type, a memory circuit type, and a buffer circuit type comprise the first basic cell, and
• the second description indicates which of the selection circuit type, the memory circuit type, and the buffer circuit type comprise the second basic cell.