Data-processing circuit and method for switching between application programs without an operating system

A data-processing circuit, comprising:

• a first memory operable to store an application program having first, second, and third portions;
• a second memory operable to store one of the portions of the application program at a time;
• a first processor coupled to the first memory and operable to execute the first portion of the application program and to alternately load the second and third portions of the application program into the second memory;
• and
• a second processor coupled to the first processor and to the second memory and operable to execute the second portion of the application program and to begin executing the third portion of the application program in response to the first portion of the application program.

A data-processing circuit, comprising:

• a first memory operable to store first, second, and third application programs;
• a second memory operable to store one of the application programs at a time;
• a first processor coupled to the first memory and operable to execute the first application program and to alternately load the second and third application programs into the second memory;
• and
• a second processor coupled to the first processor and to the second memory and operable to execute the second application program and to begin executing the third application program in response to the first application program.

A data-processing circuit, comprising:

• a master memory operable to store first, second, and third portions of an application program;
• a slave memory;
• a slave processor coupled to the slave memory;
• and
• a master processor coupled to the master memory and the slave processor and operable to
• execute the first portion of the application program while the slave processor executes the second portion of the application program from the slave memory and stores in the slave memory second-portion slave data,
• cause the slave processor to end execution of the second portion of the application program and to execute a standby program,
• save the second-portion slave data from the slave memory into the master memory while the slave processor executes the standby program,
• load the third portion of the application program from the master memory into the slave memory while the slave processor executes the standby program,
• cause the slave processor to end execution of the standby program and to execute the third portion of the application program stored in the slave memory and to store in the slave memory third-portion slave data, and
• continue executing the first portion of the application program while the slave processor executes the third portion of the application program stored in the slave memory.

An electronic system, comprising:

• a data input device;
• a data output device;
• and
• data-processing circuit coupled to the data input and data output devices and comprising
• a first memory operable to store an operating system and first portions of first and second application programs;
• a second memory operable to store second portions of the first and second application programs;
• a first processor coupled to the first memory and operable to switch back and forth between executing the first portions of the first and second application programs under the control of the operating system;
• and
• a second processor coupled to the second memory and operable in a stand-alone mode to switch back and forth between executing the second portions of the first and second application programs.

An electronic system, comprising:

• a data input device;
• a data output device;
• and
• data-processing circuit coupled to the data input and data output devices and comprising
• a first memory operable to store an application program having first, second, and third portions;
• a second memory operable to store one of the portions of the application program at a time;
• a first processor coupled to the first memory and operable to execute the first portion of the application program and to alternately load the second and third portions of the application program into the second memory;
• and
• a second processor coupled to the first processor and to the second memory and operable to execute the second portion of the application program and to begin executing the third portion of the application program in response to the first portion of the application program.

An electronic system, comprising:

• a data input device;
• a data output device;
• and
• data-processing circuit coupled to the data input and data output devices and comprising
• a master memory operable to store first, second, and third portions of an application programs;
• a slave memory;
• a slave processor coupled to the slave memory;
• and
• a master processor coupled to the master memory and the slave processor and operable to
• execute the first portion of the application program while the slave processor executes the second portion of the application program from the slave memory and stores in the slave memory second-portion slave data,
• cause the slave processor to end execution of the second portion of the application program and to execute a standby program,
• save the second-portion slave data from the slave memory into the master memory while the slave processor executes the standby program,
• load the third portion of the application program from the master memory into the slave memory while the slave processor executes the standby program,
• cause the slave processor to end execution of the standby program and to execute the third portion of the application program stored in the slave memory and to store in the slave memory third-portion slave data, and
• continue executing the first portion of the application program while the slave processor executes the third portion of the application program stored in the slave memory.

A method, comprising:

• executing a first portion of an application program with a master processor while a slave processor executes a second portion of the application program and generates second-portion slave data;
• ending execution of the second portion of the application program;
• executing a standby program with the slave processor after ending execution of the second portion of the application program;
• saving the second-portion slave data while the slave processor executes the standby program;
• loading a third portion of the application program into slave memory while the slave processor executes the standby program;
• ending execution of the standby program;
• executing the third portion of the application program with the second processor after ending execution of the standby program;
• and
• executing the first portion of the application program with the master processor while the slave processor executes the third portion of the application program.