Finite impulse response filter, communication transmission apparatus and communication reception apparatus
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHidekuni Yomo, Yuuri Yamamoto, Yoshinori Kunieda
Life of this patent
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Abstract
Wiring is variably connected between delay section 102 having N delay elements, D0 to DN-1, and multiplying section 104 having N multipliers, c(0) to c(N-1). Further, wiring is variably connected between multiplying section 104 and adding section 106 having N adders, K0 to KN-1. When the oversampling number of an input signal is dynamically varied, wiring control section 109 varies the wiring so as to obtain a filter structure with a number of parallels corresponding to the oversampling number. Thus, the finite impulse response filter is capable of responding to the dynamically varied oversampling number, and reducing its circuit size.
Claims18
A finite impulse response filter that varies a frequency bandwidth corresponding to an input signal subjected to 2n-times (n is a positive number) oversampling, comprising:
- N circuit blocks each of which has a delay element that delays the input signal sequentially and a multiplier that multiplies a delayed input signal by a tap coefficient set in advance;
- an adding section that adds outputs from multipliers of the circuit blocks;
- a bandwidth detecting section that detects a frequency bandwidth from the input signal;
- and
- a wiring control section that dynamically controls connections of wiring of inputs and outputs of the N circuit blocks corresponding to the detected bandwidth.
A finite impulse response filter that varies a frequency bandwidth corresponding to an input signal subjected to 2n-times (n is a positive number) oversampling, comprising:
- N circuit blocks each having a multiplier that multiplies an input signal by a tap coefficient set in advance, an adder that receives as its input a multiplication result by the multiplier, and a delay element that delays an addition result by the adder;
- a bandwidth detecting section that detects a frequency bandwidth from the input signal;
- and
- a wiring control section that dynamically controls connections of wiring connecting the delay element and an adder of another circuit block corresponding to the detected bandwidth.
Dependencies are inferred from the claim text.